DDR Memory Controller Engineer Jobs: Browse Open Roles
DDR memory controller engineer roles involve designing and verifying the DRAM controller IP that manages all communication between a processor and external memory.
Guides, industry insights, and career advice for IC engineers, ASIC designers, and chip architects.
DDR memory controller engineer roles involve designing and verifying the DRAM controller IP that manages all communication between a processor and external memory.
CXL design engineer roles focus on implementing and verifying the Compute Express Link protocol stack for data center memory and accelerator attach.
Post-silicon validation engineers are the first to power on new silicon, root-cause bring-up failures, and qualify chips for volume production.
Demand for DV engineers consistently outpaces supply, making verification one of the most accessible entry points into professional chip design.
"VLSI design engineer openings span the full IC stack, from digital RTL and analog circuits to physical implementation and verification."
"Tapeout engineers own the final chip assembly and signoff process before GDS data ships to the foundry."
Chiplet architectures have gone mainstream at AMD, Intel, and AI chip startups, creating demand for engineers who can co-design across die, interposer, and package.
Hardware security has become a mandatory design discipline in payment, IoT, automotive, and AI chip programs, creating openings for IC engineers who work on root-of-trust blocks, cryptographic accelerators, and TrustZone implementations.
Find analog layout engineer jobs requiring Cadence Virtuoso expertise and advanced node tapeout experience at companies building precision analog circuits.
Find power integrity engineer jobs at companies with advanced tapeouts, where PDN signoff using Ansys RedHawk-SC and Cadence Voltus is a core deliverable.
"Signal integrity engineers keep GHz-rate signals clean across chip, package, and PCB, with roles at Marvell, Apple, Broadcom, and AI chip teams."
"Phase-locked loop engineers are the clock architects of modern chips, with roles at Qualcomm, Apple Silicon, Nvidia, and AI chip startups."