Security Design Engineer IC Jobs: Browse Chip Security Roles

Security design engineer IC roles have shifted from niche specialty to standard headcount on chip teams. Payment chips, IoT MCUs, automotive controllers, and AI inference accelerators now specify hardware security primitives during the SoC architecture phase, not as an afterthought before tape-out.

The technical scope covers the full security stack at the silicon level: hardware root of trust, secure boot ROM with anti-rollback, cryptographic accelerators for AES, RSA, ECC, SHA-2, and SHA-3, TrustZone and TEE partition controllers, RISC-V PMP configurations, memory protection units, and side-channel attack countermeasures. You'll take security RTL from specification through functional verification and hand each block to DFT and back-end teams with a signed-off threat-model audit trail.

Formal methods are now standard in IC security verification. Working alongside formal verification engineers to write security assertions and prove freedom from cryptographic side channels is routine at mature security teams.

The regulatory environment is raising the floor even in cost-sensitive chip programs. EU Cyber Resilience Act requirements for connected products and NIST IoT device security guidelines are pushing companies that previously shipped without dedicated hardware security features to include them in next-generation silicon.

Mobile SoC groups at Qualcomm, Apple, and MediaTek have run dedicated hardware security teams for over a decade. Automotive IC programs at NXP and Renesas have built similar functions under pressure from ISO 21434 and UN Regulation 155 compliance timelines. AI chip startups targeting edge inference in regulated markets are hiring their first hardware security engineers now, as certification requirements come into focus.

Base salaries for IC security roles run $150K–$200K at established semiconductor companies. Staff-level engineers at hyperscaler in-house silicon teams reach $250K–$300K total comp. The semiconductor salary guide has current ranges by geography and seniority.

If you come from ASIC design with a background in low-power or functional safety RTL, your verification discipline and constraint-driven design habits apply directly. The tool chains are familiar; the difference is a threat model running in parallel to the functional specification.

Save a search for "security design engineer IC" on semidesignjobs.com and set a compensation alert to track market rates as hardware security requirements keep broadening.

FAQ

What is a hardware root of trust and why does it matter in IC security design?

A hardware root of trust is an immutable, tamper-resistant foundation in a chip from which all security operations derive their trust, including secure boot, key provisioning, and attestation. Without it, software-only security measures can be bypassed by an attacker with physical access to the device.

What are side-channel attacks and how do IC security engineers mitigate them?

Side-channel attacks exploit observable physical characteristics of a chip, such as power consumption, electromagnetic emissions, or timing variations, to extract secret keys. IC security engineers implement countermeasures including constant-time algorithms, power analysis masking, and physical shielding.

How has the IoT boom affected security design engineer IC demand?

The proliferation of connected IoT devices has sharply increased demand for hardware security engineers. Regulators in the EU and US are mandating security requirements for consumer IoT products, driving embedded security design into even cost-sensitive chip programs.