Senior DSP Firmware Engineer

Job Title

Senior DSP Firmware Engineer

Role Summary

Design and deliver firmware that implements and validates DSP algorithms on embedded processors for pre‑silicon and post‑silicon platforms. Work closely with system architects, DSP designers, verification, and hardware teams to ensure real‑time performance and system integration.

Own defined firmware subsystems, drive test‑driven development for DSP firmware, and mentor junior engineers.

Experience Level

Senior — hiring profile requests 3–5 years of relevant embedded/firmware development experience.

Responsibilities

Core responsibilities include firmware design, integration, validation, and debugging for DSP systems.

• Design, implement, and maintain firmware for advanced DSP algorithms on embedded processors.
• Design finite state machines for acquisition and tracking control loops.
• Optimize firmware for real‑time constraints: latency, throughput, and resource usage.
• Develop and own pre‑silicon, test‑driven firmware frameworks and HAL integration with simulation and emulation platforms.
• Collaborate with verification teams to align firmware validation with regression infrastructure.
• Debug complex firmware, DSP, and system‑level issues using logs, traces, and instrumentation.
• Support regression testing by identifying root causes and improving test coverage.
• Enforce firmware coding standards, test coverage, and best practices; mentor junior engineers.

Requirements

Must-have technical skills and experience; preferred items listed separately.

• 3–5 years embedded/firmware development experience for DSP‑centric systems.
• Solid Digital Signal Processing fundamentals and hands‑on algorithm implementation experience.
• Proficient in C/C++ for firmware development.
• Experience optimizing FFT algorithms and FFT‑based resampling (experience on SiFive processors is a plus).
• Experience with debugging, tracing, profiling, and hardware/software debuggability tools.
• Ability to work cross‑functionally with systems, DSP, verification, and hardware teams; strong communication and mentoring skills.

Nice-to-have

• Experience with coherent optical systems or silicon photonics.
• Knowledge of RISC‑V architecture (SiFive or similar).
• Familiarity with FPGA and emulation platforms for pre‑silicon validation.
• Lab bring‑up experience (JTAG, logic analyzers, oscilloscopes) and UVM/SystemVerilog verification methodologies.

Education Requirements

Bachelor's or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a closely related field is specified.

About the Company

Company: Celero Communications

Headquarters: Ottawa, Ontario, Canada

Designs and develops optical transceivers and ASIC solutions for next-generation optical modems, focusing on digital ASIC/RTL design, verification, and optical communication technologies.