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Packaging Engineer - Materials

Volantis Semiconductor
August 27, 2026
Full-time
Remote friendly (San Francisco, California, United States)
Worldwide
Process Engineering Jobs, Level - Mid-Career

Job Title

Packaging Engineer - Materials

Role Summary

Hands-on process and materials engineer responsible for wafer-level molding and underfill process development, material qualification, and assembly integration for advanced semiconductor packages (FOWLP, 2.5D/3D, chiplet). Works across development, supplier qualification, and transfer to manufacturing.

Collaborates with OSATs, material suppliers, thermo-mechanical modeling, reliability, and manufacturing teams to ensure robust package performance through productization and high-volume production.

Experience Level

Mid-level engineer; seeking an experienced candidate. No specific years of experience provided.

Responsibilities

Primary responsibilities include process development, material qualification, and cross-functional support.

  • Develop and optimize wafer-level molding processes (compression, transfer, mold underfill) for FOWLP and advanced heterogeneous packages.
  • Select and qualify mold compounds and underfills; evaluate filler content, CTE, modulus, Tg, viscosity, and moisture uptake.
  • Drive underfill process development including capillary underfill, no-flow, and mold underfill dispensing strategies, flow/void optimization, and cure profile development.
  • Define process windows and controls to mitigate warpage, delamination, voids, bleed-out, mold flash, and filler settling across wafer and panel formats.
  • Collaborate with OSATs and suppliers to qualify materials, define dispense and cure equipment requirements, and manage process transfers into production.
  • Lead characterization of material properties (viscosity, gel time, cure kinetics, adhesion, CTE, modulus) and correlate behavior to process outcomes and reliability.
  • Support reliability qualification activities including thermal cycling, drop, mechanical shock, and power cycling; perform failure analysis.
  • Work with thermal/mechanical modeling teams to predict solder joint reliability and warpage for different materials and package architectures.
  • Coordinate with design, reliability, thermal, and manufacturing teams from concept through high-volume production.

Requirements

Must-have technical skills and practical experience for process development and manufacturing support.

  • Must-have: Hands-on experience with wafer-level molding and underfill for FOWLP, 2.5D, or chiplet packaging.
  • Deep understanding of mold compound and underfill material science: epoxy resin systems, filler particle size and loading, cure chemistry, and how material properties drive thermo-mechanical package behavior.
  • Experience with underfill dispense techniques (capillary, no-flow, mold underfill), flow and void characterization, bleed-out control, and cure process optimization including staged and snap cure profiles.
  • Ability to perform failure analysis and material characterization using cross-sections, SEM/EDS, CSAM, TGA, DSC, and DMA.
  • Experience working with OSATs and material suppliers to develop, qualify, and transfer processes into production, including equipment setup and process control plans.
  • Strong problem-solving skills and experience with DOE-driven process optimization to address yield and reliability issues in manufacturing environments.
  • Nice-to-have / Preferred: Experience with photonics/III‑V underfills and optically clear encapsulants; high-filler, low-CTE mold compounds; high-power/high-TDP packaging; integration in 2.5D/3D/CoWoS-like assemblies; and exposure to thermo-mechanical modeling.

Education Requirements

Not specified.


About the Company

Company: Volantis Semiconductor

Semiconductor hardware startup developing wafer-scale heterogeneous packages that integrate silicon and compound semiconductor dies for high-TDP AI platforms. Focus areas include advanced packaging design and process development, interposer technologies, thermal/mechanical challenges, and system co-design.

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Date Posted: 2026-08-26