Senior Staff Package Design Engineer — MIS substrate / flip‑chip exposed‑die (power or GaN experience required)
RenesasJob Title
Senior Staff Package Design Engineer — MIS substrate / flip‑chip exposed‑die (power or GaN experience required)
Role Summary
Design and qualify advanced package and interconnect solutions for power SiP/modules, wafer‑level and flip‑chip packaging, multi‑chip modules, and power device packages. Lead material, process and OSAT/CM selection and qualification to ensure reliable ramp to production.
Work cross‑functionally with product, reliability, quality and operations teams to resolve issues, implement production monitoring, and support qualification for consumer, industrial and automotive power applications.
Experience Level
Senior — typically >10 years of relevant package development experience focused on power SiP/module, wafer‑level and flip‑chip packaging.
Responsibilities
Primary responsibilities include package design, process qualification, and production ramp support.
- Benchmark, select and qualify materials, processes and assembly subcontractors (OSAT) or contract manufacturers (CM).
- Collaborate with OSAT/CM to plan and run DOE to optimize processes, establish process specifications, and resolve production issues.
- Qualify new packages and processes with product and reliability teams; investigate and address internal and external customer complaints.
- Ensure smooth transition to production and implement ramp‑up monitoring.
- Develop and maintain packaging roadmap, package design rules, and technical expertise in power SiP/modules, wafer‑level packaging, flip‑chip interconnects and panel‑level packaging.
- Support qualification activities for consumer, industrial and automotive power applications.
Requirements
Must‑have technical skills and experience; listed items are required unless noted as optional.
- Extensive experience in power SiP/modules, wafer‑level and flip‑chip packaging methods.
- Hands‑on knowledge of assembly processes, process qualification methods, SPC and statistical analysis tools.
- Experience working with OSATs/CMs and running DOE for process optimization.
- Ability to establish package design rules and execute packaging roadmaps.
- Strong interpersonal, communication, analytical and presentation skills.
- Knowledge of wire‑bonding and multi‑chip module technologies is a plus.
- Experience with GaN packaging or power device packaging is a plus.
Education Requirements
Doctorate, Master’s or Bachelor’s degree in Physics, Chemistry, Mechanical, Electrical or Materials Engineering. (Degrees explicitly listed in the source.)
About the Company
Company: Renesas
Headquarters: Hitachinaka, Japan
Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.
