Mixed-Signal IC Design Engineer

Job Title

Mixed-Signal IC Design Engineer

Role Summary

Design, integrate, and deliver digital subsystems inside mixed-signal integrated circuits, owning the RTL-to-tapeout implementation flow. Work closely with analog, layout, and system teams to ensure robust high-speed performance in analog-centric ICs.

Position is based in the company offices (listed locations include Paris and Tel Aviv) and reports to the hardware/digital lead.

Experience Level

Mid-level — expects demonstrated industry experience delivering digital RTL through synthesis, place-and-route, timing closure, and tape-out in mixed-signal or analog/RF contexts.

Responsibilities

Primary responsibilities include design, integration, and ownership of digital blocks within mixed-signal IC projects.

• Design and verify digital subsystems that interface to high-speed analog/mixed-signal circuits (calibration engines, control FSMs, data converters, multiplexers).
• Integrate and adapt external IP (GPIOs, LVDS I/Os, SPI/I2C, serial interfaces) to meet analog signal and timing constraints.
• Lead digital implementation flow for mixed-signal blocks: RTL, synthesis, floorplanning, P&R, timing closure, physical signoff, and tape-out.
• Collaborate with analog, layout, and system teams to co-optimize digital-analog boundaries and resolve cross-domain issues.
• Contribute to development of high-speed serial I/O subsystems; support SerDes-related design when required.

Requirements

Must-have technical skills and experience required to perform the role.

• Strong digital RTL design skills in Verilog/SystemVerilog for mixed-signal systems, including calibration/control loops and high-speed data paths.
• Proven ability to drive digital blocks from design through verification, synthesis, floorplanning, P&R, timing closure, and tape-out in the context of analog or RF ICs.
• Deep understanding of digital-analog integration challenges: timing closure, noise coupling, clock domain crossing, and analog-aware floorplanning.
• Experience integrating and customizing external IP (GPIO, LVDS, SPI/I2C); practical knowledge of high-speed serializer/deserializer integration is highly valued.
• Proficiency with industry-standard EDA toolchains for front-end and back-end implementation and mixed-signal layout constraints.
• Effective collaborator across analog, layout, and system engineering teams; strong English communication skills.

Nice-to-have:

• Direct experience with SerDes or high-speed serial PHY design and verification.
• Experience in analog/RF IC projects and analog-aware physical design techniques.
• French language ability (useful but not required).

Education Requirements

Not specified.

About the Company

Company: Arago

Arago is an AI and computer hardware startup (founded 2024) developing AI-driven semiconductor and photonics solutions. The company brings together engineers and researchers in photonics, electronics, software, mathematics, and machine learning to accelerate prototype-to-silicon development across hubs in France, North America, and Israel.