Job Title
ASIC Design Verification Engineer
Role Summary
Remote contract role responsible for functional and performance verification of custom ASIC/SoC designs. The engineer will develop verification environments, drive verification strategies, and work with RTL designers to close functional issues and meet sign-off criteria.
Experience Level
Senior — requires extensive experience; the posting requests approximately 12 years of ASIC design verification experience.
Responsibilities
Key technical responsibilities for the verification lead:
- Develop and execute verification plans for block, subsystem, and full-chip environments.
- Design and implement SystemVerilog/UVM test benches: agents, monitors, scoreboards, checkers, and coverage models.
- Write SystemVerilog Assertions (SVA) and incorporate formal verification where appropriate.
- Drive constrained-random and directed testing strategies and implement coverage-driven verification for sign-off.
- Run simulations, triage failures, and collaborate with RTL designers to debug and resolve issues.
- Manage regression testing, CI pipelines, and simulation farms to ensure continuous integration and repeatable regressions.
- Participate in design reviews and microarchitecture discussions to provide verification feedback.
Requirements
Must-have technical skills and experience; concise list of required and helpful qualifications.
- Minimum ~12 years of ASIC design verification experience (as stated in the posting).
- Proficiency in SystemVerilog and UVM for testbench development.
- Experience writing SystemVerilog Assertions (SVA) and using assertion-based verification.
- Strong understanding of RTL design flows and industry-standard interfaces (APB, AHB, AXI).
- Deep experience with constrained-random and directed testing, coverage closure, and sign-off criteria.
- Strong simulation and debugging skills; experience triaging failures and collaborating with RTL teams.
- Experience managing CI/regression pipelines and simulation farm infrastructure.
- Familiarity with integrating formal verification into the verification flow (preferred).
Education Requirements
Not specified.
About the Company
Company: SHAKTECH
SHAKTECH is a technology firm focused on semiconductor and ASIC development, hiring engineering talent for remote contract roles in design verification and related chip engineering functions.

Date Posted: 2026-06-04