Intel Physical Design Engineer Jobs: Open Roles
Intel runs its own fabs, and that changes what a physical design job there actually looks like. PD engineers sit close to the process teams building 18A and Intel 3, so design-technology co-optimization is a working conversation instead of a foundry support ticket.
The day-to-day covers floorplanning, place and route, clock tree synthesis, timing closure, and DFM signoff on multi-billion-transistor CPU tiles, GPU dies, and AI accelerator chiplets. You will lean on strong STA experience, fluency in Intel's internal flows alongside Synopsys ICC2, Cadence Innovus, and PrimeTime, and comfort with FinFET and RibbonFET (Intel's gate-all-around) design rules. Interviews tend to probe how you close timing on a congested block and how you reason about IR drop, not tool trivia. Experience with EMIB and Foveros 3D packaging co-design is increasingly what separates candidates.
Intel staffs these roles across several design centers. Hillsboro, Oregon handles Core and Xeon processor implementation. Chandler, Arizona covers networking and communications ICs. Haifa, Israel works on GPU and server platforms, and there are teams in Penang and Bengaluru as well. If you have shipped RTL on Intel processors and want to move closer to implementation, these centers are where the tiles get built.
IDM 2.0 added a second category of PD work. Intel Foundry needs reference implementation flows for external customers, so engineers who know Intel 3 and 18A design rules cold are valuable on both the product and the foundry side. That foundry-enablement track did not exist a few years ago, and it rewards people who understand process-specific corners rather than treating the PDK as a black box.
Most listings ask for hands-on ownership of a block from netlist to signoff, not just tool operation. To compare adjacent openings, browse the wider physical design job listings or read the general physical design engineer roundup for context on the broader market. We also track physical design roles in Hillsboro, Oregon specifically.
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FAQ
What is unique about Intel physical design jobs compared to fabless companies
Intel PD engineers work directly on Intel's own nodes (18A, Intel 3, Intel 7) and collaborate with the fab's process engineers. That creates DTCO opportunities and exposure to process-design interaction you do not get at companies using external foundries.
What Intel products do physical design engineers work on
Core Ultra CPU tiles, Arc GPU dies, Gaudi AI accelerators, and custom foundry-customer chips. Because Intel's roadmap is chiplet-based, PD engineers also contribute to tile integration and 3D packaging co-design.
Does Intel have physical design jobs outside the US
Yes. Intel has PD teams in Haifa, Israel (Xeon and network processors), Penang, Malaysia, and Bengaluru, India. SemiDesignJobs lists Intel physical design openings globally.