VLSI Design Verification Engineer 1
AmbarellaJob Title
VLSI Design Verification Engineer 1
Role Summary
Join the VLSI Verification team to verify next-generation SoCs using advanced, coverage-driven methodologies. Work with architects, RTL designers, and post-silicon teams to ensure correctness and reliability of complex designs.
Experience Level
Entry-level / Early career. The posting does not specify years of experience.
Responsibilities
Primary responsibilities include:
- Develop and execute verification plans for complex SoCs and IP blocks.
- Build SystemVerilog/UVM testbenches, assertions, and coverage models.
- Collaborate with architects, RTL designers, and post-silicon debug teams.
- Debug failures, analyze results, and improve verification coverage and regression suites.
Requirements
Key technical skills and competencies. Education items are listed separately below.
- Strong background in digital design and computer architecture.
- Experience with SystemVerilog, UVM, Verilog and C/C++ for verification.
- Strong debugging, analytical, and problem-solving skills.
- Experience developing assertions and coverage-driven verification flows.
- Nice-to-have: scripting with Python or Perl; experience with AI-assisted verification tools; SoC-level verification and post-silicon debug experience.
Education Requirements
Bachelor's, Master's, or PhD in Electrical Engineering, Computer Science, or a related field (listed in the posting).
About the Company
Company: Ambarella
Headquarters: Santa Clara, California, USA
Ambarella is a leader in computer vision and video processing technology, providing advanced solutions that enhance the performance of video applications. Focused on quality and innovation, Ambarella develops products for diverse uses, including autonomous vehicles, surveillance systems, and smart cameras, aiming to deliver pristine imagery and efficient compression while minimizing power consumption.
