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VLSI Design Engineer

Silicon Interfaces
October 2, 2026
Full-time
On-site
Mumbai, Maharashtra, India
β‚Ή20,000 - β‚Ή25,000 INR monthly
Verification Jobs, Level - Mid-Career

Job Title

VLSI Design Engineer

Role Summary

Join a VLSI engineering team focused on SystemVerilog/UVM-based design and verification for data communications, wired/wireless networking, interconnect technologies and multicore processors. The team works on portable stimulus (PSS/DSL), fault simulation, low-power design and regression testing.

Position is based in Mumbai and requires in-person (work-from-office) attendance.

Experience Level

Mid-level - candidates with approximately 1 to 6 years of relevant experience; also open to recent graduates as specified in Education Requirements.

Responsibilities

Primary responsibilities include:

  • Develop and verify RTL and verification environments using SystemVerilog and UVM.
  • Implement and validate protocol testbenches and compliance tests (e.g., I2C, USB, Ethernet, 802.11, PCIe, AMBA/AXI/CHI).
  • Work on portable stimulus (PSS/DSL) integration, fault simulation, and low-power (UPF) verification flows.
  • Collaborate with cross-functional and remote teams to integrate IP/ASIC components and run regressions.
  • Automate verification tasks and debug issues using Linux and shell scripting tools.

Requirements

Must-have skills and experience:

  • Strong digital logic design fundamentals.
  • Proficiency in SystemVerilog and UVM methodologies.
  • Protocol verification experience (I2C, USB, Ethernet, 802.11, PCIe, AMBA/AXI/CHI or similar).
  • Comfortable with Linux, vim/vi, and shell scripting for verification automation.
  • Ability to work on-site in Mumbai and coordinate with geographically distributed teams.
  • Good debugging and problem-solving skills in verification environments.

Nice-to-have:

  • Experience with Portable Stimulus (PSS/DSL), fault simulation tools, low-power verification (UPF), multicore verification, or DFT.

Education Requirements

BE/B.Tech or ME/M.Tech in Electronics, Communications, or related engineering fields (Tier-1 or Tier-2 engineering colleges). Candidates should be 2025 or earlier graduates for Bachelor's, or Master's class of 2026. Equivalent practical experience not specified.


About the Company

Company: Silicon Interfaces

Headquarters: Mumbai, India

Silicon Interfaces provides AI/ML-enabled semiconductor services for IPs, ASICs and multicore verification, specializing in functional verification (SystemVerilog/UVM), Portable Stimulus (PSS/DSL), low power (UPF), fault simulation and DFT, with global service centers and VLSI design centers based in Mumbai.

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Date Posted: 2026-10-02