Library Characterization Engineer

Job Title

Library Characterization Engineer

Role Summary

Work on characterizing standard cell libraries across process nodes to produce silicon-correlated timing, power, and noise models used by synthesis, STA and place-and-route flows. The role sits between circuit design, EDA tooling, and process technology and requires close collaboration with designers and tool teams. Travel: 0–25%.

Experience Level

Mid-level. The posting does not state specific years of experience, but expects hands-on characterization or closely related circuit design experience.

Responsibilities

Primary responsibilities include producing and validating cell models, developing characterization flows, and automating release processes.

• Characterize standard cell libraries for timing, power, noise, and signal integrity across PVT corners.
• Generate and validate Liberty (.lib) models for synthesis, STA, and place-and-route.
• Develop and maintain characterization tool flows (e.g., Cadence Liberate, Synopsys SiliconSmart/PrimeLib).
• Run, debug, and validate SPICE-level simulations (HSPICE / FineSim / Spectre) for cell-level characterization.
• Perform QA validation and ensure silicon correlation of models.
• Support statistical characterization formats such as LVF and variation modeling.
• Collaborate with circuit designers to debug correlation and cell behavior issues.
• Develop scripts and automation in Python, Perl, TCL, or Shell to streamline flows.

Requirements

Must-have technical skills and abilities; preferred items listed separately.

• Must-have: Understanding of CMOS circuit design, timing arcs, and cell behavior (combinational and sequential).
• Must-have: Knowledge of Liberty syntax, NLDM/CCS/LVF modeling, and timing/power semantics.
• Must-have: Familiarity with STA concepts including setup/hold and CCS noise.
• Must-have: Scripting proficiency in Python, TCL, Perl, or Shell for automation.
• Must-have: Strong analytical and debugging skills; ability to manage multiple library deliverables independently.
• Nice-to-have: Experience with complex sequential cells (retention, multi-bit, ultra-low-power, high-performance).
• Nice-to-have: Experience with ML-based characterization acceleration techniques.
• Nice-to-have: Knowledge of EM/IR analysis and reliability modeling.

Education Requirements

Master's degree in Electrical Engineering, Electronics Engineering, or a closely related field is required.

About the Company

Company: Microchip

Headquarters: Chandler, Arizona, USA

Microchip is a leading semiconductor company focused on developing innovative solutions to enhance the human experience. With a commitment to empowering innovation, Microchip prioritizes the value of its employees by fostering a culture that supports their growth and contributions.