Video Codec Design Engineer (up to Staff)
QualcommJob Title
Video Codec Design Engineer (up to Staff)
Role Summary
Join Qualcomm's SoC design team to architect and deliver hardware IP for video encoders and decoders targeting high-performance, low-power semiconductor products across IoT, mobile, automotive, and embedded markets.
The role covers microarchitecture, algorithm-to-hardware modeling, RTL implementation, optimization for power/performance/area (PPA), and cross-functional integration with verification, firmware, physical design, and system teams.
Experience Level
Senior (Staff-capable). Typical experience expectations vary with seniority; the role requires multiple years of ASIC/video codec design experience (generally 2+ years at higher levels up to 4+ years depending on level).
Responsibilities
Key responsibilities include designing and integrating video codec hardware and validating it across pre-silicon and post-silicon phases.
- Architect, design, and optimize hardware blocks for video encode/decode: motion estimation/compensation, transform/quantization, entropy coding, in-loop filters, and rate-control datapaths.
- Translate video standard requirements (H.264/AVC, H.265/HEVC, AV1, VVC, etc.) into scalable, configurable microarchitectures and hardware algorithms.
- Develop C/C++/SystemC models for performance, accuracy, and power estimation and perform algorithm-to-hardware decomposition to guide RTL implementation.
- Evaluate codec KPIs with systems and architecture teams: throughput, latency, memory bandwidth, and quality metrics.
- Collaborate with verification teams to define test plans, functional coverage, and debug infrastructure for robust pre-silicon validation.
- Drive integration of codec IP into SoC subsystems and ensure correct interaction with memory subsystems, firmware interfaces, and NoC/fabric components.
- Work with physical design to meet PPA targets through timing-aware microarchitecture, pipeline optimization, and clock/power domain planning.
- Support post-silicon bring-up and validation; analyze chip performance and recommend architectural or firmware updates.
Requirements
Must-have technical skills and experience; degree requirements are summarized separately below.
- Strong understanding of video compression algorithms: transform coding, motion estimation/compensation, loop filters, and entropy coding.
- Experience in RTL design (Verilog/SystemVerilog), microarchitecture, pipeline design, and hardware performance optimization.
- Proficiency in C, C++, Python, and/or SystemC for modeling and architectural exploration.
- Solid grasp of SoC design concepts including memory hierarchy, interconnects, bandwidth constraints, and power–performance trade-offs.
- Experience collaborating with verification, physical design, and firmware/software teams.
- Preferred: experience contributing to or implementing modern video standards (HEVC, VVC, AV1, VP9); scripting experience and familiarity with FPGA flows.
Education Requirements
Degree requirements stated in the source: Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field is cited. Alternative qualification paths were listed: Bachelor's degree plus 4+ years of relevant ASIC design/verification/validation/integration experience; Master's degree plus 3+ years; or PhD plus 2+ years of relevant experience. Fields referenced include Electrical Engineering, Computer Engineering, Computer Science, engineering or related technical fields; related professional experience may substitute where specified.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
