Verification Engineer Senior

Job Title

Verification Engineer Senior

Role Summary

Senior member of an ASIC design verification team responsible for defining and executing verification strategies for blocks, subsystems and SoCs. Works across architecture, RTL, post-silicon and physical design teams to drive verification closure for complex semiconductor products.

Technical leadership role: develops reusable SystemVerilog/UVM and formal verification environments, analyzes performance and coverage, and mentors junior engineers.

Experience Level

Senior — typically 6+ years of ASIC/FPGA design verification experience with a Bachelor’s degree, or 4+ years with a Master’s degree (see Education Requirements for details).

Responsibilities

Primary responsibilities delivered independently and with cross-functional partners:

• Define and implement scalable, reusable verification plans, testbenches, and environments for blocks, subsystems and SoCs to meet coverage targets.
• Lead verification execution: author detailed test plans, run simulations, and drive technical reviews with design and architecture teams.
• Execute simulations and models to verify functionality, analyze power and performance, and identify design issues.
• Investigate, reproduce, root-cause, and debug pre-silicon failures and implement corrective actions.
• Collaborate with SoC architects, microarchitects, RTL developers, post-silicon and physical design teams to validate complex features.
• Improve verification infrastructure and methodologies, incorporate post-silicon learnings, and update test plans for future products.
• Mentor and lead junior engineers, promoting knowledge transfer and best practices.

Requirements

Must-have technical skills and experience:

• Strong experience applying object-oriented programming principles to verification (SystemVerilog UVM or equivalent methodologies).
• Experience developing UVM and/or formal-based verification architectures and methodologies.
• Familiarity with coverage-driven verification, constrained-random testing, and strong debug skills.
• Experience with industry-standard protocols such as AMBA AXI/AXI-S/CHI and low-speed interfaces (UART, SPI, I2C/I3C).

Nice-to-have:

• Hands-on experience with simulators (Synopsys VCS, Cadence Xcelium, or equivalent).
• Experience with scripting languages and additional validation/debug techniques for ASIC/FPGA domains.

Education Requirements

Minimum: Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related STEM field plus 6+ years of ASIC/FPGA design verification experience; OR a Master’s degree in those fields plus 4+ years of ASIC/FPGA design verification experience. Preferred: graduate/post-graduate degree in EE/CE/CS or related STEM with overall 6+ years of experience. (Degrees and experience were listed explicitly in the source.)

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.