Verification Engineer

Job Title

Verification Engineer

Role Summary

The Verification Engineer will develop module- and system-level verification solutions for high-speed network interfaces between xPUs and Oriole's proprietary network, moving designs from prototype to production quality. The role sits within the verification and hardware teams and focuses on verification infrastructure, testbench and test development, and coverage closure.

Experience Level

Mid-level (typically 3–7 years of relevant industry experience).

Responsibilities

Deliver verification plans, environments, and tests across module and system scopes; support hardware validation and debug.

• Define and execute verification strategies and plans based on specifications and team input.
• Develop module- and system-level testbenches including stimulus, monitors, checkers, and scoreboards.
• Design and implement tests, maintain functional coverage models, and drive coverage closure.
• Support hardware validation: reproduce and debug complex functional issues and collaborate with RTL and system teams to resolve root causes.
• Architect verification infrastructure and automate verification flows and regressions.

Requirements

Key technical skills and tools expected; separated into must-have and nice-to-have items.

• Must-have: Extensive hands-on FPGA or ASIC verification experience, including unit and system-level verification for production-quality IP and high-speed GPU/CPU interfacing and networking (100Gbps+).
• Must-have: Strong SystemVerilog skills and solid knowledge of verification methodologies, functional coverage, assertions, and constrained-random verification.
• Must-have: Experience with verification tools/simulators such as Questa or VCS, and scripting/automation using Python and TCL.
• Must-have: Experience architecting verification environments and infrastructure and driving coverage closure.
• Must-have: Practical experience supporting hardware validation and collaborating with RTL and system teams to diagnose and resolve issues.
• Nice-to-have: Experience with formal verification tools (e.g., Questa Formal, JasperGold).
• Nice-to-have: Familiarity with high-speed interfaces such as UALink, NVLink, PCIe, RDMA, and CXL.
• Other: Good communication skills and a collaborative, humble attitude.

Education Requirements

Bachelor's or Master's degree in electronic engineering, physics, or a related technical field, or equivalent industry experience.

About the Company

Company: Oriole Networks

Headquarters: London, United Kingdom

Developer of high-performance networking technologies for AI/ML and HPC data centers, focused on high-speed interfaces between xPUs and proprietary networks to accelerate training/inference and reduce energy consumption.