Lead Engineer - IC Verification

Job Title

Lead Engineer - IC Verification

Role Summary

Lead verification of complex digital RTL blocks within wireless modem baseband and PHY-layer subsystems for Wi‑Fi and low-power IoT SoCs. The role is part of the Modem team and focuses on ensuring functional correctness, performance, and reliability of modem IP prior to SoC integration.

Experience Level

Senior - 7–15 years of experience in RTL design verification or equivalent industry experience.

Responsibilities

Key responsibilities include building verification infrastructure, executing verification plans, and driving closure of coverage and functional issues.

• Develop and maintain SystemVerilog/UVM-based verification environments for modem baseband and PHY IPs.
• Design and implement module- and subsystem-level testbenches including agents, drivers, monitors, scoreboards, and coverage models.
• Define and execute comprehensive verification plans and drive constrained-random verification and coverage closure.
• Integrate C-based algorithmic reference models for bit-exact functional verification.
• Verify mixed-signal datapath and PHY-layer modules and validate digital/analog interfaces.
• Debug complex RTL and testbench issues and work with design and system teams to identify root causes.
• Collaborate across teams to resolve integration challenges and support successful IP delivery into SoCs.
• Participate in design reviews, verification planning, and continuous improvement of verification methodologies.

Requirements

Requirements below separate must-have technical qualifications from additional desirable experience.

Must have:

• Extensive hands-on experience with SystemVerilog and UVM verification methodologies and components (agents, drivers, monitors, scoreboards, coverage).
• Strong knowledge of constrained-random testing, functional coverage, and coverage closure techniques.
• Experience integrating C-based reference models into verification environments for bit-exact validation.
• Solid understanding of digital communication systems and PHY-layer concepts relevant to modem design.
• Proven ability to debug complex RTL and verification infrastructure issues and collaborate cross-functionally.
• Experience verifying mixed-signal datapath and PHY-layer modules used in wireless communication systems.

Nice to have:

• Experience with IEEE 802.11 Wi‑Fi, 4G/5G, or other OFDM-based systems.
• Hands-on verification of wireless modem baseband and DSP IPs (FFT, FIR, correlators, FEC decoders).
• Experience with subsystem-level verification and SoC integration of complex IPs.
• Familiarity with mixed-signal verification techniques and digital/analog interfaces.
• Experience using AI-powered tools to enhance verification productivity and analysis.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Electronics, Communication Engineering, or a related technical field is listed as the expected academic background.

About the Company

Company: Silicon Labs

Headquarters: Austin, Texas, USA

Silicon Labs is a leading innovator in low-power wireless connectivity, creating embedded technology that connects devices to improve lives. With a focus on advanced edge connectivity applications, the company provides device makers with cutting-edge solutions and support. Headquartered in Austin, Texas, Silicon Labs operates in over 16 countries, serving markets such as smart home, industrial IoT, and smart cities.