Job Title
Verification Engineer
Role Summary
Join Fractile's silicon verification team to develop pre-silicon verification for ML/AI ICs targeted at data-centre inference. You will work with modelling, architecture and RTL design teams to raise functional quality, improve verification workflows, and reduce tape-out risk and cost.
This role is based in one of Fractile's UK offices (Bristol or London) and involves hands-on verification engineering across RTL, testbenches and verification infrastructure.
Experience Level
Mid-level β approximately 3+ years of relevant verification or software/hardware engineering experience preferred.
Responsibilities
Primary responsibilities include planning and executing verification activities and improving verification workflows to ensure RTL meets specification and quality targets.
- Develop and execute verification plans from specification to closure.
- Design and build testbenches and stimulus for functional verification.
- Create checkers, functional models and coverage strategies; drive coverage closure.
- Debug RTL failures using waveforms and simulation infrastructure.
- Collaborate with architects, RTL designers and modelling teams to refine specifications and fixes.
- Integrate software-oriented practices into hardware verification workflows (monorepo, CI, tooling).
- Contribute to verification tooling, automation and test infrastructure (open-source and commercial tools).
- Participate in architecture and release discussions to raise product quality and reduce time-to-tapeout.
Requirements
Clear distinction between required skills and beneficial experience to perform effectively from day one.
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Must-have: Strong software skills (Python or another object-oriented language such as C++).
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Must-have: Practical understanding of digital hardware and ability to read and debug SystemVerilog RTL.
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Must-have: Familiarity with waveform-based debugging and simulation workflows.
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Nice-to-have: UVM or other verification methodology experience; pre-silicon RTL verification, verification planning and coverage closure.
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Nice-to-have: Transaction-Level Modelling (UVM/SystemC or similar) and SystemVerilog Assertions (SVA).
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Nice-to-have: Experience with cocotb, Verilator, Icarus Verilog, commercial EDA tools, or formal verification.
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Nice-to-have: Experience working in monorepo environments and familiarity with Bazel-style workflows.
Education Requirements
Not specified.
About the Company
Company: Fractile
Headquarters: London, UK
Fractile is on a mission to revolutionize AI by developing silicon, systems, and software that enable the fastest execution of advanced models at lower costs. Established in 2022, the company has rapidly expanded, fostering a collaborative culture in its London and Bristol offices. With a focus on innovation in ML/AI IC product development, Fractile combines hardware and software to deliver high-impact solutions for data center applications.

Date Posted: 2026-07-22