UVM SystemVerilog Verification Engineer

Job Title

UVM SystemVerilog Verification Engineer

Role Summary

Develop and execute UVM/SystemVerilog verification plans to validate AirSpan ASIC and FPGA designs for 4G/5G network products. Work closely with design and development teams to find, diagnose, and resolve functional and performance issues.

Focused on building testbenches, automation, and regression infrastructure to ensure product compliance and reliability.

Experience Level

Senior — typically 10+ years of verification experience focused on UVM/SystemVerilog for FPGA/ASIC systems.

Responsibilities

Primary responsibilities include verification planning, test development, and defect resolution:

• Develop and implement UVM-based verification plans and test strategies for FPGA/ASIC designs.
• Create and maintain SystemVerilog testbenches, test cases, and automation frameworks.
• Perform functional, system-level, and regression testing; run and maintain regression suites.
• Use simulation tools (ModelSim, QuestaSim, or equivalent) to validate designs and analyze results.
• Debug failures, root-cause issues, and collaborate with RTL/hardware teams to fix defects.
• Measure and report coverage, maintain defect tracking, and produce verification documentation.
• Implement and validate bit-accurate models and participate in DSP-related verification when required.
• Continuously improve verification processes, tools, and automation to increase efficiency.

Requirements

Must-have technical skills and experience:

• 10+ years of hands-on UVM-based verification experience for FPGA or ASIC systems.
• Strong SystemVerilog and Universal Verification Methodology (UVM) expertise.
• Proficiency in scripting for automation (Python or Perl).
• Experience with simulation environments such as ModelSim or QuestaSim.
• Experience with C/C++ and building/validating bit-accurate models.
• Experience debugging DSP designs and using coverage/verification debug tools; familiarity with formal techniques.
• Knowledge of O-RAN architecture and 4G/5G protocol concepts.
• Strong problem-solving skills and the ability to work in cross-functional teams.

Nice-to-have / preferred:

• Experience verifying communication protocols.
• Familiarity with FPGA development flows and HDLs (VHDL/Verilog).
• Experience with hardware/software co-verification techniques.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical field.

About the Company

Company: AirSpan Networks

Headquarters: Boca Raton, Florida, United States

AirSpan Networks is a global provider of 4G and 5G network solutions, offering small cells, radios, baseband units and software for operators, enterprises and industrial applications to deliver efficient, cost‑effective connectivity.