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UVM SystemVerilog Verification Engineer

AirSpan Networks
July 21, 2026
Full-time
On-site
Plano, Texas, United States
Verification Jobs, Level - Senior

Job Title

UVM SystemVerilog Verification Engineer

Role Summary

The UVM SystemVerilog Verification Engineer will develop and execute verification plans for AirSpan's FPGA and ASIC designs using SystemVerilog and UVM. The role works with design and development teams to validate functionality, performance, and reliability of digital hardware for 4G/5G systems.

Experience Level

Senior — approximately 10 years of relevant verification experience (senior-level expectations).

Responsibilities

Primary responsibilities focus on verification planning, test development, execution, and defect resolution for FPGA/digital designs.

  • Develop and implement UVM-based verification plans and test strategies for FPGA/ASIC designs.
  • Create and maintain SystemVerilog testbenches, test cases, and automation frameworks.
  • Perform functional, system-level, and regression testing; run simulations and analyze results.
  • Debug failures, isolate root causes, and collaborate with design teams to resolve defects.
  • Implement and validate bit-accurate models and assist in DSP-related debugging.
  • Track coverage metrics, document test procedures and results, and report defects.
  • Continuously improve test processes, tools, and automation to increase efficiency.

Requirements

Must-have technical skills and experience below. Preferred items are listed as "Nice-to-have."

  • Must-have: ~10 years of UVM-based verification experience for FPGA systems.
  • Must-have: Strong knowledge of SystemVerilog and Universal Verification Methodology (UVM).
  • Must-have: Proficiency with scripting for automation (Python or Perl).
  • Must-have: Experience with simulators such as ModelSim or QuestaSim.
  • Must-have: Experience with C/C++ and implementing bit-accurate models.
  • Must-have: Familiarity with debugging tools, coverage metrics, and formal verification techniques.
  • Must-have: Knowledge of O-RAN architecture and protocols for 4G/5G networks.
  • Nice-to-have: Experience verifying communication protocols and hardware/software co-verification.
  • Nice-to-have: FPGA development experience and familiarity with VHDL or Verilog.
  • Strong problem-solving skills, attention to detail, and ability to work in cross-functional teams.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical field (specified in the source).


About the Company

Company: AirSpan Networks

Headquarters: Boca Raton, Florida, United States

AirSpan Networks is a global provider of 4G and 5G network solutions, offering small cells, radios, baseband units and software for operators, enterprises and industrial applications to deliver efficient, cost‑effective connectivity.

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Date Posted: 2026-07-21