Job Title
UVM/SystemVerilog Design Verification Engineer
Role Summary
Responsible for full functional verification of a custom controller for analog components with interfaces including SPI, Ethernet and AXI. The role focuses on developing verification infrastructure, test plans, and coverage-driven verification to ensure design correctness and verification throughput.
Experience Level
Senior β requires approximately 8 years of verification experience.
Responsibilities
Primary duties include ownership of functional verification and building verification assets for unit and subsystem validation.
- Own functional verification for the custom controller design.
- Design and implement UVM/SystemVerilog verification environments and testbenches.
- Develop test plans for functional units and subsystems and implement test cases.
- Create monitors, scoreboards, checkers and models (including Python models) to validate behavior.
- Drive VIPs and other stimulus using UVM and Python-based tests.
- Analyze coverage across dimensions and close coverage gaps.
- Perform SDF and gate-level simulation (GLS) bring-up and related testing.
Requirements
Must-have technical experience and required skills.
- Minimum ~8 years of experience with verification methodologies and languages such as UVM and SystemVerilog.
- Experience developing and maintaining verification testbenches, test cases, and environments.
- Hands-on experience with SDF and gate-level (GLS) simulations.
- Experience with Ethernet, SPI and AXI interfaces.
- Proven ability to develop monitors, scoreboards, and verification infrastructure.
Nice-to-have
- High proficiency in Python for test generation and modeling.
- Experience with assertions, formal verification, or JTAG.
- Experience with analog and real-number modeling.
- Familiarity with general-purpose operating systems such as Linux or Android.
Education Requirements
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
About the Company
Company: Oso Semiconductor
Headquarters: Mountain View, CA, United States
Early-stage fabless semiconductor startup developing mmWave beamforming RFICs that deliver 2β4x power reduction for phased array systems across SATCOM, 5G, and radar. Founded by UC Berkeley PhDs, the company has raised Series A funding and works with defense and commercial customers on full-custom mmWave front-end and beamformer chips.

Date Posted: 2026-06-16