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UCIe/D2D Post Si Validation Engineer

Arm
July 25, 2026
Full-time
Remote friendly (Bengaluru, Karnataka, India)
Worldwide
Test Engineering Jobs, Level - Mid-Career

Job Title

UCIe/D2D Post Si Validation Engineer

Role Summary

Validate Die-to-Die (D2D) UCIe interfaces on multi-die and chiplet SoC platforms across pre-silicon and post-silicon phases. The role focuses on functional validation, link training and reliability, firmware-controlled initialization, and end-to-end data integrity across complex platform configurations.

The engineer will work within the hardware validation team and collaborate closely with architecture, RTL design, PHY, firmware, packaging, signal integrity, power, clocking, and platform teams to drive silicon bring-up and resolve cross-domain issues.

Experience Level

Mid-level β€” 3 to 8 years of relevant silicon validation or high-speed interface validation experience.

Responsibilities

Primary responsibilities include planning, executing, and debugging validation activities for UCIe D2D links across speeds, widths, and package configurations.

  • Plan and perform functional validation of UCIe D2D links on pre-silicon and post-silicon platforms.
  • Validate operation across supported data rates (e.g. 8/16/24/32 GT/s per lane), link widths, lane configurations, voltage and temperature corners.
  • Develop and maintain validation test plans, test cases, and bring-up checklists for PHY, Adapter, protocol layer, and sideband interfaces.
  • Support silicon and platform bring-up: reset/clock sequencing, PHY initialization, firmware-controlled link training, and traffic enablement.
  • Verify link negotiation, lane mapping/reversal/disablement, spare-lane usage, retraining, and recovery mechanisms.
  • Validate protocol mappings (PCIe, CXL, streaming, raw-mode where applicable) and end-to-end traffic (registers, DMA, memory, cache-coherent, streaming).
  • Design and run stress and reliability tests: long-duration runs, maximum bandwidth, multi-link concurrency, repeated retraining, thermal and voltage stress.
  • Develop and debug low-level firmware and bare-metal tests for initialization, PHY configuration, error injection, traffic generation, and monitoring.
  • Create automation for test execution, configuration sweeps, log parsing, and failure detection.
  • Debug silicon issues using firmware and PHY logs, protocol traces, waveform captures, BERT results, and platform telemetry; drive issues to closure with cross-functional teams.
  • Produce and maintain validation documentation, coverage reports, and execution summaries; track defects and risks in issue-management systems.

Requirements

Must-have skills and experience required for successful performance in this role.

  • 3–8 years of silicon validation or high-speed interface validation experience focused on post-silicon and bring-up activities.
  • Hands-on experience with high-speed serial interfaces and link-layer behavior; strong understanding of PHY training, link initialization, and firmware-controlled flows.
  • Experience developing low-level firmware and bare-metal tests for initialization, register programming, error injection, and traffic generation.
  • Proficiency in test automation and scripting (e.g., Python, TCL, shell) for test execution, result analysis, and log parsing.
  • Practical debugging experience using oscilloscopes, BERTs, logic/protocol analyzers, JTAG, and waveform captures.
  • Experience validating protocol mappings (PCIe/CXL/streaming/raw-mode) and end-to-end data integrity across chiplets.
  • Strong problem-solving and cross-team collaboration skills; experience tracking defects and supporting triage.
  • Ability to design and execute stress, negative, and margin tests (BER, jitter, timing, voltage/thermal corners).

Nice-to-have:

  • Familiarity with signal integrity, packaging effects, and channel characterization.
  • Experience with platform bring-up on multi-die/chiplet systems and knowledge of platform-specific protocols.
  • Experience with Jira, Bugzilla, or equivalent issue-management systems.

Education Requirements

Not specified.


About the Company

Company: Arm

Headquarters: Cambridge, United Kingdom

ARM is a global leader in semiconductor and software design, driving innovation in computing technology. The company specializes in designing processors and systems that provide the essential building blocks for electronic devices. ARM's architecture is widely used in smartphones, servers, and IoT devices, and its collaborative culture fosters bold thinking, diversity, and high-impact benefits for its talented workforce.

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Date Posted: 2026-07-23