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Transport (RDMA and UEC) Silicon Product Architect

Intel Corporation
September 10, 2026
Full-time
Remote friendly (Petah Tikva, Israel)
Worldwide
Semiconductor IP Jobs, Level - Senior

Job Title

Transport (RDMA and UEC) Silicon Product Architect

Role Summary

Principal-level engineering role responsible for defining silicon product architectures for transport including RDMA and UEC. The role drives high-level product definitions, microarchitecture concepts, and cross-functional specifications to deliver high-performance, low-power hardware and complete hardware-software integration.

Works within Intel Israel on a hybrid schedule at the assigned Intel site (Petah-Tikva / Jerusalem) and collaborates with platform, design, and software teams.

Experience Level

Level: Senior / Principal Engineer. See the Education Requirements section for the documented years-of-experience guidance that applies to degree status.

Responsibilities

Primary responsibilities include defining product scope and driving architecture decisions:

  • Define product bounding boxes: bandwidth, latency, power, workloads, port counts and types.
  • Create high-level architecture block diagrams and formal specifications.
  • Specify protocols and functional interactions to ensure correct HW-SW behavior.
  • Evaluate feasibility and tradeoffs across performance, timing, power, area, and workload targets.
  • Invent and refine microarchitectures to meet leadership targets for performance, power, area, and timing.
  • Propose and validate experimental or proof-of-concept design alternatives.
  • Review and influence cross-functional roadmaps and set technology targets.
  • Collaborate with platform design and software teams to define interfaces and system integration.
  • Mentor technical leaders and contribute to team development and technical culture.
  • Act as a change agent and role model for organizational and technical alignment.

Requirements

Key must-have skills and experience (degree requirements summarized separately under Education Requirements):

  • Proven expertise in architecture definition, IP architecture development, and VLSI design principles.
  • Deep knowledge of transport protocols, including RDMA and related technologies.
  • Strong ability to analyze and resolve complex engineering tradeoffs involving performance, power, timing and area.
  • Experience specifying and delivering hardware-software integration for high-performance systems.
  • Track record of defining clear specifications and collaborating across hardware, firmware, and software teams.
  • Demonstrated ability to drive decisions, influence roadmaps, and communicate effectively with cross-functional stakeholders.
  • Experience mentoring engineers and building technical capability within an organization.
  • Position of Trust: role requires consent to and successful completion of an extended background investigation.

Nice-to-have:

  • Proven record of delivering next-generation architectural features or novel microarchitectures.
  • Experience shaping industry technical direction or working at system/product level scale.

Education Requirements

Documented in source: Bachelor's (BS) in a specialized field or equivalent experience is acceptable; Master's and PhD are mentioned as alternatives with reduced years-of-experience requirements. The posting states equivalent practical experience is acceptable. (Specific mappings in source: 12+ years with a Bachelor's, 8+ years with a Master's, or 6+ years with a PhD.)


About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.

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Date Posted: 2026-09-10