Technical Staff Engineer - Design

Job Title

Technical Staff Engineer - Design

Role Summary

Senior design engineer responsible for RTL-to-silicon SOC design for high-performance, low-power wireless SoC and attach solutions. Work with verification, analog, validation, physical design and software teams across international sites to deliver tape-out qualified ICs.

Experience Level

Senior — requires 12+ years of digital SOC design experience focused on low-power design.

Responsibilities

Contribute to all phases of SOC design and delivery; collaborate across engineering functions to verify, implement, and qualify silicon.

• Drive SOC design from concept through tape-out: RTL coding, synthesis, timing closure and implementation flow execution.
• Develop and apply timing constraints (SDC), perform timing analysis and synthesis optimization.
• Work with verification teams to meet test plans and ensure thorough functional verification.
• Coordinate with physical design for integration, floorplanning, and timing closure.
• Support validation and silicon bring-up; debug issues on FPGA and silicon boards.
• Develop and optimize low-power design techniques and power estimation methodologies.
• Interface with external vendors and third-party IP providers to resolve integration issues.
• Participate in design reviews and ensure compliance with project requirements and design standards.
• Collaborate with international design and implementation teams; communicate progress and issues clearly in English.

Requirements

Must-have technical skills and experience; followed by concise nice-to-have items.

• Minimum 12+ years of experience in digital SOC design with focus on low-power design.
• Proficient in RTL design using Verilog/SystemVerilog.
• Hands-on experience with synthesis, timing constraint (SDC) creation, and timing analysis.
• Experience with ASIC design flow tools: LINT, Formal, CDC/RDC, power estimation, MBIST/DFT.
• Strong knowledge of SOC architecture (ARM/MIPS), bus protocols (AMBA/AXI) and common peripheral IPs (USB, Ethernet, I2C, SPI).
• Experience with Bus Matrix design and integration of peripheral IPs.
• Proficient scripting skills (TCL, Perl, Python) for automation and flow development.
• Excellent English reading, writing and verbal communication; strong analytical and problem-solving skills.
• Able to work independently, self-motivated, energetic, and an effective team player.
• Travel: 0%–25%.

Nice-to-have:

• Experience with verification methodologies (UVM/OVM).
• Experience with validation and silicon-debugging on FPGA and IC boards.
• Knowledge of wireless communication standards (Bluetooth/BLE, Wi‑Fi).
• Familiarity with security features and functional-safety design principles.

Education Requirements

Required: Bachelor's degree in computer engineering, electrical engineering, or a related field. Preferred: Master’s degree in computer engineering, electrical engineering, or related field.

About the Company

Company: Microchip

Headquarters: Chandler, Arizona, USA

Microchip is a leading semiconductor company focused on developing innovative solutions to enhance the human experience. With a commitment to empowering innovation, Microchip prioritizes the value of its employees by fostering a culture that supports their growth and contributions.