Technical Lead – LINT, CDC & RDC Verification

Job Title

Technical Lead – LINT, CDC & RDC Verification

Role Summary

Lead methodology development, qualification, deployment, and signoff for LINT, CDC, and RDC verification across SoC and IP projects. Work with design, DFT, safety, CAD, and EDA vendors to define enterprise signoff criteria and resolve structural verification issues.

Experience Level

Senior - 10–15+ years in SoC/IP design verification, signoff methodology, and EDA tool deployment.

Responsibilities

Deliver and operationalize LINT, CDC, and RDC verification methodologies and lead technical activities across multiple projects.

• Define and maintain LINT, CDC, and RDC signoff methodologies for IP, subsystem, and SoC levels.
• Drive deployment, qualification, and enterprise rollout of EDA solutions (Questa, VC SpyGlass).
• Establish waiver management, signoff criteria, and best practices; lead technical reviews.
• Perform RTL quality checks and resolve lint violations (coding style, synthesis mismatches, FSM, dead code, X-propagation, clock/reset usage, DFT checks).
• Execute CDC signoff: analyze clock-domain crossings, synchronizers, reconvergence, coherency, handshake protocols, and asynchronous interfaces.
• Lead RDC analysis and signoff: debug reset sequencing, reset synchronizers, and metastability risks; collaborate with safety teams on reset architecture.
• Develop and maintain automation for verification flows, reporting, dashboards, and CI/CD integration using Tcl/Python/Perl.
• Mentor engineers, coordinate with CAD/DFT/safety teams, and engage with EDA vendors on tool roadmaps and feature evaluation.

Requirements

Core technical skills and experience required to perform the role.

Must-have:

• 10–15+ years in SoC/IP design verification, signoff methodology, and EDA tool deployment.
• Hands-on expertise with Siemens Questa (Lint/CDC/RDC) and Synopsys VC SpyGlass (Lint/CDC/RDC) for signoff.
• Proven ability to debug structural verification issues and drive CDC/RDC closure with root-cause analysis.
• Experience developing automation and flows using Tcl, Python, or Perl; integration with CI/CD and regression suites.
• Strong stakeholder management and mentoring experience; ability to lead technical reviews and define enterprise processes.
• Practical knowledge of reset architectures, synchronizers, and metastability mitigation.

Nice-to-have:

• Experience with DFT, functional safety collaboration, CAD tool deployment, or enterprise-scale EDA qualification.
• Prior experience creating reusable verification infrastructure and deployment packages.

Education Requirements

Not specified.

About the Company

Company: NXP Semiconductors

Headquarters: Nijmegen, Netherlands

NXP Semiconductors N.V. is a global semiconductor company that provides High Performance Mixed Signal and Standard Product solutions. With over 45,000 employees and operations in more than 35 countries, NXP is a leader in secure connectivity solutions for embedded applications, catering to automotive, industrial IoT, mobile, and communication infrastructure markets. The company is committed to innovation and sustainability, advancing a smarter, safer, and more sustainable world through technology.