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ASIC Design Verification Engineer

Meta Platforms
November 5, 2026
Full-time
On-site
Sunnyvale, California, United States
$178,000 - $250,000 USD yearly
Verification Jobs, Level - Senior

Job Title

ASIC Design Verification Engineer

Role Summary

Work on verification of IP and SoC designs for data-center infrastructure within an ASIC/hardware team. Deliver verification plans, develop UVM-based testbenches, and drive verification closure across simulation, formal, emulation, and post-silicon activities.

Experience Level

Senior - position expects an experienced engineer; posting specifies 8+ years of relevant verification experience.

Responsibilities

Accountable for verification planning, environment implementation, and closure for IP, sub-system or SoC blocks. Collaborate with design, emulation, software and silicon teams to reach verification and coverage targets.

  • Define and execute IP/SoC verification plans and metrics.
  • Design and develop UVM-based testbenches and functional tests.
  • Drive verification to closure using simulation, formal, and emulation.
  • Debug and root-cause functional failures; coordinate fixes with design teams.
  • Collaborate cross-functionally with design, model, emulation, and silicon validation teams.
  • Improve verification infrastructure and flows; adopt industry methodologies and tools.

Requirements

Must-have skills and experience required to perform the role.

  • Must-have: 8+ years of IP/sub-system or SoC level verification experience using SystemVerilog UVM/OVM and/or C/C++ verification methodologies.
  • Must-have: Experience leading verification of complex IPs or SoCs (examples: PCIe, RoCE, DDR, HBM, Ethernet, cache controllers, NoC).
  • Must-have: Proficiency with EDA tools and scripting for verification flows (Python, TCL, Perl, Shell).
  • Must-have: Proven debugging and root-cause skills and ability to close verification based on functional and code coverage metrics.
  • Nice-to-have: Experience with SV Assertions, Formal, Emulation, or post-silicon validation.
  • Nice-to-have: Experience with ARM or RISC-V sub-systems, micro-architectural performance verification, or GPU/CPU verification.
  • Nice-to-have: Familiarity with version control systems (Git, Mercurial, SVN) and prior track record of first-pass silicon success.

Education Requirements

Bachelor's degree in Computer Science, Computer Engineering or a related technical field, or equivalent practical experience.


About the Company

Company: Meta Platforms

Headquarters: Menlo Park, California, United States

American technology company that develops social networking products (Facebook, Instagram, WhatsApp) and invests in virtual/augmented reality hardware and software through Reality Labs, focusing on connectivity, advertising, and immersive computing experiences.

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Date Posted: 2026-11-05