Technical Lead, Infrastructure Silicon Validation

Job Title

Technical Lead, Infrastructure Silicon Validation

Role Summary

Lead pre-silicon and post-silicon bring-up, validation, and qualification for Meta's custom data-center ASICs. Define validation methodology, drive development of validation tooling and automation, and lead cross-functional debugging and productization efforts to ensure silicon reliability and performance at fleet scale.

Work closely with ASIC design, architecture, systems engineering, foundries, and IP vendors to influence design decisions and accelerate bring-up timelines.

Experience Level

Senior-level; requires 12+ years of experience in ASIC pre- and post-silicon validation, silicon debug, and failure analysis.

Responsibilities

Lead validation activities across the full silicon lifecycle and establish scalable infrastructure and processes. Key responsibilities include:

• Own pre-silicon and post-silicon bring-up, validation, characterization, and qualification from test planning and emulation through fleet deployment.
• Architect and develop scalable validation frameworks, diagnostic toolsets, and automation infrastructure.
• Lead root-cause analysis and resolution of complex silicon failures across simulation, emulation, and physical silicon.
• Define validation coverage, test prioritization, and silicon readiness criteria for tape-out and productization.
• Collaborate with ASIC design, architecture, systems engineering, and external partners to resolve silicon-level issues.
• Establish validation best practices, coverage metrics, and quality gates across the organization.
• Mentor engineers and elevate team capability in silicon debug, test automation, and characterization.
• Translate production fleet data and system-level use cases into actionable validation requirements and regression improvements.
• Define long-term roadmaps for validation infrastructure and tooling to support future silicon programs.

Requirements

Must-have technical skills and experience:

• 12+ years of experience in ASIC pre- and post-silicon validation, bring-up, characterization, and productization for data center or high-performance computing applications.
• 12+ years of experience with silicon debug, failure analysis, and root-cause methodologies across simulation, emulation, and physical silicon environments.
• Proven experience defining and leading organization-wide validation strategy, coverage planning, and test automation architecture for complex ASIC programs.
• Experience developing validation frameworks and diagnostic tools using Python, C, or C++.
• Demonstrated ability to collaborate across ASIC design, architecture, systems engineering, foundries, and IP vendors.

Nice-to-have:

• Experience with RDMA, DPDK, or host driver development related to silicon validation and performance characterization.
• Prior experience with networking and NIC products.
• Experience validating high-speed interconnects and memory subsystems (PCIe, Ethernet, DDR4/5, HBM, NVMe/Flash).
• Experience with data center systems management, bare-metal Linux, and fleet-scale silicon deployment and monitoring.
• Experience with emulation and FPGA-based platforms for pre-silicon test-content development and early bring-up.

Education Requirements

Bachelor's degree in Computer Science, Computer Engineering, or a related technical field, or equivalent practical experience.

About the Company

Company: Meta Platforms

Headquarters: Menlo Park, California, United States

American technology company that develops social networking products (Facebook, Instagram, WhatsApp) and invests in virtual/augmented reality hardware and software through Reality Labs, focusing on connectivity, advertising, and immersive computing experiences.