Job Title
Technical Director, Digital IP Design and IP Architect
Role Summary
Senior technical leader responsible for hands-on digital IP design, verification, and architecture across NXP MCU/MPU product portfolios. The role focuses on legacy IP modernization, design support, and cross-functional coordination with SoC, systems, and software teams.
Primary domain areas include bus bridges (AHB/AXI), boot/clock/reset management, peripheral controllers (NOR/PSRAM/NAND, eMMC/SD), ECC algorithms, and ARM M-class cores. The role spans pre-silicon design/verification and post-silicon debug and support.
Experience Level
Senior-level. The posting prefers highly experienced candidates (the employer lists ~20+ years as a desirable profile), but candidates with demonstrated leadership and deep IP experience will be considered.
Responsibilities
Key responsibilities include ownership of IP design, verification, validation, and cross-team coordination.
- Rapidly become familiar with legacy digital IP across the MCU/MPU portfolio and support change requests and maintenance.
- Design and verify digital IP blocks; contribute hands-on RTL and verification work.
- Lead IP architecture specification for NOR/PSRAM/NAND flash controllers and related peripherals.
- Develop and validate ECC algorithms (BCH, Reed‑Solomon, LDPC) and related models.
- Provide pre-silicon and post-silicon debug, root-cause analysis, and firmware/software support.
- Collaborate with global SoC, systems, and software teams to ensure IP meets product requirements.
- Create and maintain design documentation, specifications, and programming guides for SW teams.
- Participate in post-silicon validation and continuous improvement of design processes.
- Monitor industry trends for peripheral technologies (NOR, NAND, UFS, NVMe, etc.).
Requirements
Must-have technical skills and experience.
- Proven experience building and supporting digital IP across multiple generations of SoCs, including post-silicon support and firmware collaboration.
- Strong RTL design and verification skills in Verilog/SystemVerilog.
- Deep knowledge of AHB and AXI bus protocols and microprocessor architectures; experience with ARM M-class cores.
- Experience with NOR and NAND flash controller functionality and integration.
- Familiarity with ECC concepts and implementation (BCH, Reed‑Solomon, LDPC) for storage IP.
- Understanding of low-power design techniques and implications for IP.
- Proven debugging, analytical, and cross-team communication skills for pre- and post-silicon issues.
Nice-to-have:
- Extensive industry experience (~20+ years) in digital IC design and IP ownership.
- Experience with industry-standard EDA tools for verification, synthesis, and STA.
- Experience with peripheral controllers such as USB, eMMC/SD, UFS, NVMe and advanced ECC modeling.
- Track record of leading technical discussions and mentoring engineering teams.
Education Requirements
Required: Bachelors degree in Electrical Engineering, Computer Engineering, or a related field. Desired: Masters degree in Electrical/Electronics Engineering or related field. (The posting does not cite alternative "equivalent experience" language explicitly.)
About the Company
Company: NXP Semiconductors
Headquarters: Nijmegen, Netherlands
NXP Semiconductors N.V. is a global semiconductor company that provides High Performance Mixed Signal and Standard Product solutions. With over 45,000 employees and operations in more than 35 countries, NXP is a leader in secure connectivity solutions for embedded applications, catering to automotive, industrial IoT, mobile, and communication infrastructure markets. The company is committed to innovation and sustainability, advancing a smarter, safer, and more sustainable world through technology.

Date Posted: 2026-07-28