Job Title
Technical Architect - SoC, Verilog, UVM, C, C++
Role Summary
Engineer responsible for design verification of a high-bandwidth SoC interconnect controller used in AI and HPC platforms. The role focuses on developing scalable verification environments, protocol-aware verification components, and driving functional and performance closure.
Experience Level
Senior-level (Technical Architect).
Responsibilities
Primary responsibilities include creating and executing verification infrastructure and tests to ensure protocol, functional, and performance correctness.
- Develop UVM-based verification environments and reusable components.
- Implement protocol-aware scoreboards, monitors, and checkers.
- Build functional coverage models and drive coverage closure.
- Write assertions (SVA) and protocol checks.
- Create directed, constrained-random, and stress tests; run regressions.
- Debug RTL issues using waveform analysis and transaction logs; collaborate with RTL designers.
- Use verification metrics to drive closure and report progress.
Requirements
Must-have technical skills and attributes.
- Strong SystemVerilog and UVM experience; knowledge of constrained-random and coverage-driven verification.
- Experience writing SVA assertions and developing protocol monitors/checkers.
- Proficiency with scripting for verification (Python, Perl, or Tcl).
- Experience debugging complex hardware interactions and RTL issues.
- Familiarity with C/C++ for testbench or environment utilities.
- Strong communication skills and ability to collaborate with architecture and design teams.
- Nice-to-have: experience with high-bandwidth interconnects, AI/HPC platforms, or controller IP verification.
Education Requirements
Not specified.
About the Company
Company: HCLTech
Headquarters: Noida, Uttar Pradesh, India
Global IT services and consulting company providing digital, engineering, cloud, and enterprise services, specializing in software development, infrastructure, and R&D for industries including technology, healthcare, finance, and manufacturing.

Date Posted: 2026-07-07