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Team Leader - RF/Analog Analysis & Characterization

Renesas
September 16, 2026
Full-time
On-site
Athens, Attica, Greece
Device Engineering Jobs, Level - Senior

Job Title

Team Leader - RF/Analog Analysis & Characterization

Role Summary

Manage and lead a small engineering team responsible for pre- and post-silicon activities across RF, analog and PHY system circuit building blocks, from transistor-level up to full-chain/system validation. The role focuses on silicon bring-up, debugging, performance evaluation and delivering measurable data-sheet parameters.

Experience Level

Senior - the posting requests experienced engineers; the role expects more than 3 years in RF/analog system or chip design and experience leading or mentoring engineers.

Responsibilities

The team leader will coordinate lab bring-up, debugging, and analysis to meet functional and performance targets.

  • Manage and mentor team members; coordinate tasks and report progress.
  • Lead pre-silicon analysis and identify issues; propose DFT and mitigation strategies.
  • Define and implement RF/analog driver fixes and design support for issue mitigation.
  • Bring up chips in the lab, perform debugging and instrument-based testing.
  • Evaluate and optimize chip performance; produce formal data-sheet parameters from measured data.
  • Define and build automation, tooling and data-collection flows for analysis and characterization.
  • Analyze statistical data and communicate results to design and system teams.

Requirements

Must-have technical and interpersonal qualifications; advantages listed separately.

  • Must-have: >3 years experience in RF/analog system design or chip design; hands-on experience with RF/analog testing and lab-based bring-up and debugging of silicon.
  • Must-have: Proven ability to debug complex silicon issues and support design teams with practical mitigations.
  • Must-have: Strong written and spoken English and effective interpersonal and communication skills.
  • Must-have: Team player who can set and meet goals and deadlines, and who develops and tutors colleagues.
  • Nice-to-have: Prior people management or matrix-management experience (managed 1–2 people is an advantage).
  • Nice-to-have: Experience with Cadence Virtuoso (schematics and layout).
  • Nice-to-have: Demonstrated ability to propose innovative technical solutions and assertively communicate findings to peers and management.

Education Requirements

Not specified.


About the Company

Company: Renesas

Headquarters: Hitachinaka, Japan

Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.

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Date Posted: 2026-09-15