Systems Software Engineer, NPU Management Interface

Job Title

Systems Software Engineer, NPU Management Interface

Role Summary

Develop firmware and system software for the NPU Management Interface (MI) to enable out-of-band management, telemetry, and control between host/BMC and NPU devices. The role focuses on protocol-driven design, firmware integration, and system-level validation for datacenter-class accelerator platforms.

Experience Level

Mid-level. No explicit years-of-experience stated in the posting.

Responsibilities

Implement, integrate, and validate management-interface firmware and supporting tools to enable health, telemetry, and control of NPU devices.

• Design and implement NPU Management Interface firmware/software for communication between Host/BMC and NPU devices.
• Implement and maintain MCTP, PLDM, and custom MI command handling for out-of-band management.
• Develop device-management features over SMBus/I²C, I3C, PCIe VDM, or custom sideband channels.
• Integrate MI functionality into NPU firmware: health/error reporting, thermal and power telemetry, runtime status, utilization metrics, and debug data.
• Perform spec-driven design, implementation, and validation to ensure compliance with industry specifications.
• Support bring-up, interoperability testing, rack-scale platform integration, and system-level validation.
• Develop test strategies and validation tools based on MCTP and PLDM specifications; perform protocol compliance and regression testing.

Requirements

Must-have skills and experience required for the role; preferred items listed separately.

• Must-have: Strong proficiency in embedded C or C++ and firmware development for NPUs/accelerators, GPUs, or SoCs.
• Familiarity with management protocols MCTP and PLDM (over I²C/SMBus, I3C, or PCIe VDM) and ability to interpret protocol specifications into robust implementations.
• Experience with low-level interfaces: SMBus/I²C, I3C, SPI, PCIe.
• Knowledge of device telemetry, sensor frameworks, watchdog/reset flows, and health monitoring.
• Experience with system-level debugging using logic/protocol analyzers and low-level debug tools.
• Experience with embedded systems, bare-metal or RTOS environments, and firmware lifecycle flows.
• Nice-to-have: Experience with BMC firmware stacks (OpenBMC, Redfish, IPMI), PLDM device-model implementations, secure provisioning and firmware update mechanisms, FRU/power/thermal policy design, and rack-level datacenter or HPC integration.
• Contributions to firmware for accelerators, MCTP/PLDM implementations, or open-source system firmware projects are a plus.

Education Requirements

Not specified.

About the Company

Company: FuriosaAI

Headquarters: Seoul, South Korea

FuriosaAI develops high-performance, energy-efficient AI inference hardware and software. Founded in 2017 by semiconductor and AI engineers, the company builds AI-native compute platforms to reduce AI energy and operational costs and operates globally with offices in Korea, Silicon Valley, and an R&D lab in Lisbon.