Systems Engineer, Staff - SoC Interconnect / NoC Systems Architecture

Job Title

Systems Engineer, Staff - SoC Interconnect / NoC Systems Architecture

Role Summary

Drive architecture and system definition for next-generation SoC interconnect and Network-on-Chip (NoC) solutions. Work on requirements, architecture specification, modeling, and cross-functional integration to deliver scalable, high-performance, and power-efficient SoC interconnects across mobile, data center, automotive, and other compute platforms.

Experience Level

Senior-level. The posting references candidates with approximately 7–11 years of relevant experience in SoC/NoC architecture or similar system engineering roles.

Responsibilities

Define and validate interconnect architecture and system-level requirements; collaborate across teams to ensure implementation and silicon validation.

• Define and evolve SoC interconnect and NoC architectures, including performance, QoS, coherency, and latency targets.
• Gather and translate product use cases and system requirements into interconnect functional specifications.
• Evaluate NoC topologies, routing, arbitration, and traffic-management schemes.
• Develop and use behavioral/analytical models to analyze NoC performance and trade-offs.
• Analyze system traffic and data flows to optimize bandwidth, latency, and power.
• Collaborate with CPU, GPU, AI/ML, memory, security, power, and other subsystem teams to define interconnect requirements.
• Partner with RTL design, verification, physical design, floorplanning, power, and silicon validation teams throughout the product lifecycle.
• Support post-silicon validation by correlating pre-silicon assumptions with measured silicon behavior.

Requirements

Must-have technical skills and experience for the role; preferred skills are listed after must-haves.

• 7–11 years of experience in SoC architecture, SoC design, NoC architecture, or related system engineering roles.
• Strong understanding of on-chip interconnect concepts, NoC architectures, and coherency mechanisms.
• Familiarity with industry protocols such as ARM CHI, AXI, AHB, and ACE/ACE-Lite.
• Solid digital design fundamentals and hands-on experience with Verilog/SystemVerilog RTL development and SoC design methodologies.
• Understanding of multi-core ARMv8/ARMv9 architectures, cache coherency, memory hierarchy, and virtualization concepts.
• Experience with performance analysis, system modeling, simulation, and architectural trade-off studies.
• Strong analytical, problem-solving, communication, and cross-functional collaboration skills.
• Nice-to-have: experience with PCIe, CXL, memory subsystems, large-scale SoC for data center/AI/mobile/automotive, performance modeling, and silicon validation.

Education Requirements

Degrees mentioned: Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field. The posting lists degree-plus-experience alternatives (example: Bachelor's +4 years, Master's +3 years, PhD +2 years) and also references a preference for advanced degrees; Master's or higher is listed as preferred in parts of the posting.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.