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System Technology Research Engineer (PhD Intern)

Intel Corporation
September 16, 2026
Internship
Remote friendly (Hillsboro, Oregon, United States)
Worldwide
$141,998 - $142,002 USD yearly
SoC Architecture Jobs, Level - Entry or Early Career

Job Title

System Technology Research Engineer (PhD Intern)

Role Summary

Join Intel's Foundry System Technology team to develop System Technology Co-optimisation (STCO) methodology and evaluate 2.5D/3D dis-aggregation schemes for memory and logic stacking. The role focuses on system-level evaluations across devices, interconnects, materials, patterning, and integration to inform semiconductor and packaging roadmaps.

Experience Level

Entry-level internship. Typical candidates have 1–2+ years of relevant research experience in system architecture modeling, VLSI/layout, EDA, or multi-physics modeling.

Responsibilities

The intern will contribute to method development, modeling, and cross-team evaluations. Key responsibilities include:

  • Develop and enhance STCO methodologies for semiconductor and package co-optimization.
  • Perform system-level evaluations of devices, interconnects, patterning, materials, systems, and integration schemes.
  • Evaluate 2.5D and 3D dis-aggregation schemes using solder microbumps or hybrid bonding for memory and logic stacking across product architectures.
  • Collaborate with cross-functional teams to integrate findings into product and process roadmaps.
  • Document results, present analyses, and communicate technical tradeoffs to stakeholders.
  • Internship duration: minimum 3 months during summer 2026; possible extension based on business needs.

Requirements

Must-have technical skills and experience; preferred items listed separately.

  • 1–2+ years of research experience relevant to system architecture modeling, digital circuit analysis and design, VLSI physical layout, EDA, or multi-physics modeling of electronic materials/systems.
  • Familiarity with IC design and physical layout tools such as Cadence Virtuoso or Synopsys Fusion Compiler.
  • Analytical problem-solving, strong prioritization, and effective written and verbal communication skills.
  • Ability to work collaboratively across teams and manage stakeholder interactions.

Preferred / nice-to-have:

  • System architecture design and modeling experience.
  • IC design, simulation, physical layout, and tapeout experience.
  • Familiarity with DRAM and SRAM circuit design and layout and integrated-circuit manufacturing flow.
  • Experience with 2.5D/3D packaging technologies and 3DIC design/simulation.
  • Programming skills, preferably Python.

Education Requirements

Active Ph.D. candidacy required in Electrical Engineering, Electronics Engineering, Computer Architecture and Design, or a closely related field. The posting indicates academic standing as a PhD student and accepts knowledge obtained through coursework or research.


About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.

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Date Posted: 2026-09-14