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Synthesis Engineer, Sr Lead

Qualcomm
September 04, 2026
Full-time
On-site
Bengaluru, Karnataka, India
Physical Design Jobs, Level - Senior

Job Title

Synthesis Engineer, Sr Lead

Role Summary

Senior synthesis engineer on the hardware engineering team based in Bangalore, India. The role focuses on RTL-to-gates synthesis, low-power synthesis flows, timing constraints, and formal equivalence checking for ASIC/SoC designs.

The role works within the Engineering Group / Hardware Engineering organization and supports bringing designs from implementation to commercialization.

Experience Level

Senior. The posting lists experience minima by degree: typically requires 4+ years industry experience for senior-level responsibilities; alternative minimums stated are Bachelor's +3 years, Master's +2 years, or PhD +1 year.

Responsibilities

Primary day-to-day responsibilities include synthesis, low-power flow implementation, formal checks, and constraint/debug tasks.

  • Perform RTL-to-gates synthesis using Synopsys Design Compiler / DCG / DC_NXT / Fusion Compiler and/or Cadence RC / Genus.
  • Implement and validate multi-voltage and UPF-based low-power synthesis flows.
  • Create, review, and debug timing constraints and SDC files.
  • Run and interpret formal equivalence checks using Cadence LEC or Synopsys Formality.
  • Automate synthesis and verification flows using Perl/Tcl and maintain makefile-based flows.
  • Collaborate with RTL, verification, and physical design teams to resolve functional or timing issues.
  • Drive features from design through implementation and commercialization.

Requirements

Must-have technical skills and experience; education details are in the Education Requirements section below.

  • Proven hands-on expertise in synthesis tools (Synopsys Design Compiler/DCG/DC_NXT/Fusion or Cadence RC/Genus).
  • Experience with power-aware synthesis and UPF flows for low-power design.
  • Experience with formal verification tools (Cadence LEC or Synopsys Formality).
  • Strong skills writing and debugging timing constraints (SDC) and timing closure experience.
  • Proficiency in scripting (Perl and/or Tcl) and experience with makefile-based flows.
  • Excellent analytical and problem-solving skills; ability to drive work across teams.
  • Nice-to-have: experience with RTL design or integration; prior track record of taking ideas through commercialization.

Education Requirements

Qualifications listed include one of the following: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field (with 3+ years hardware engineering experience); or a Master’s degree in Computer Science, Electrical/Electronics Engineering, Electronics or related field (with 2+ years experience); or a PhD in Computer Science, Electrical/Electronics Engineering or related field (with 1+ year experience). "Related field" is accepted; a Master's in Electronics/Electrical Engineering was explicitly mentioned as well.


About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.

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Date Posted: 2026-09-03