SW Engineer - Silicon CAD Tool Development

Job Title

SW Engineer - Silicon CAD Tool Development

Role Summary

Join the Silicon Chassis Automation Tool team to design and implement a chassis automation platform that converts user requirements and topology parameters into RTL, register definitions, integration artifacts, and verification collateral. Work directly with the tool lead and partner teams (RTL, verification, SoC integration) to deliver reliable, testable automation for multiple SoC programs.

Experience Level

Mid-level. Candidates typically have several years of hands-on experience in CAD/EDA tooling or design automation and software development (roughly 3+ years of relevant experience).

Responsibilities

Deliver and maintain a scalable, maintainable automation tool and its subsystems. Primary responsibilities include:

• Design and implement the chassis automation tool and key subsystems to meet multi-program requirements.
• Translate automation requirements into working code that generates RTL, register definitions, RDL, verification collateral, timing and integration artifacts.
• Integrate generated outputs with frontend and backend silicon tool flows and validate correctness of artifacts (e.g., Verilog, SDC, RDL).
• Implement rule functions, write unit tests, and expand test coverage to ensure correctness and maintainability.
• Establish and maintain CI/CD regression pipelines for automated validation.
• Collaborate closely with architecture, RTL design, verification, and SoC integration teams to align tool outputs with downstream expectations.
• Follow and improve software design, testing, packaging, and release best practices.

Requirements

Must-have technical skills and experience:

• 3+ years of Python (or similar language) experience building software systems, including packaging, testing, and CLI tooling.
• Experience designing and validating structured schemas using JSON or YAML.
• Solid software engineering fundamentals: version control (Git), code reviews, unit/integration testing, and CI/CD practices.
• Practical experience building or integrating tools that produce or validate RTL/design outputs and associated verification artifacts.
• Proven ability to own well-scoped subsystems, deliver on milestones, and work cross-functionally with design and verification teams.

Nice-to-have:

• Understanding of digital SoC design concepts, RTL hierarchy, synthesis flows, and parameterized IP design.
• Working knowledge of SystemVerilog and familiarity with EDA tool flows.
• Experience with NoC or interconnect protocols (AXI, CHI, PCIe, UCIe) and IP packaging standards (e.g., IP-XACT).
• Exposure to graph algorithms/data structures for topology or routing, and GUI development experience (Qt/QML, React, Electron).
• Strong object-oriented design and software architecture principles.

Education Requirements

Bachelor's degree in Electrical Engineering, Computer Science, or a related field with 4+ years of experience in CAD/EDA tooling or design automation; or a Master's degree in a related field with 3+ years of experience. Related technical degrees acceptable.

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.