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Hardware Engineer (FPGA/ASIC)

Jane Street
August 04, 2026
Full-time
On-site
London, ENG, United Kingdom
RTL Design Jobs, Level - Mid-Career

Job Title

Hardware Engineer (FPGA/ASIC)

Role Summary

Design and implement FPGA and ASIC-based systems and the tools used to develop them. Work primarily on RTL and verification, and contribute to the development and maintenance of high-level hardware design and testing infrastructure.

Join a hardware engineering team that uses programming-language techniques and tooling (including Hardcaml and OCaml) to improve hardware design, testing, and validation. Day-to-day work includes RTL design, integration, and tooling for FPGA and ASIC projects.

Experience Level

Mid-level. No specific years-of-experience requirement stated.

Responsibilities

Key responsibilities include designing hardware systems and improving the tooling and workflows used for RTL development and verification.

  • Design and implement new FPGA or ASIC applications from ground up.
  • Write and maintain RTL using high-level construction libraries and HDLs (e.g., Hardcaml/OCaml, Verilog).
  • Develop and extend testing, verification, and integration tooling for hardware designs.
  • Work with vendor toolflows and EDA tools for FPGA and ASIC implementation and timing closure.
  • Build, run, and debug hardware projects through synthesis, place-and-route, and bring-up phases.
  • Collaborate with software and systems engineers to integrate hardware into larger systems, especially networking contexts.
  • Participate in design reviews, verification planning, and continual improvement of development practices.

Requirements

Must-have technical skills and attributes; followed by a short list of desirable skills.

  • Must-have: Comfortable programming in at least one software language and able to apply software engineering practices to hardware design.
  • Must-have: Experience with a Hardware Description or Construction language (VHDL, Verilog, Chisel, PyMTL, or similar) for writing and testing hardware designs.
  • Must-have: Experience with FPGA or ASIC vendor tools and flows (examples: Vivado, Quartus, Genus, Innovus).
  • Must-have: Practical experience building a working hardware project (academic, professional, or personal).
  • Must-have: Effective collaborator, intellectually curious, and fluent in English.
  • Nice-to-have: Familiarity with OCaml and Hardcaml, experience with typed functional languages, and prior work on networking-related hardware.
  • Nice-to-have: Experience with Verilog, C for test/firmware, and extending tooling for RTL design and verification.

Education Requirements

Not specified.


About the Company

Company: Jane Street

Headquarters: London, United Kingdom

Jane Street is a global trading firm and liquidity provider that specializes in technology-driven strategies. Established in 2000, the company focuses on providing liquidity and improving market efficiency through advanced analytics and trading technologies.

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Date Posted: 2026-08-04