Subsystem Design Verification Engineer

Job Title

Subsystem Design Verification Engineer

Role Summary

Verify complex SoC subsystems and drive verification from planning through closure. Work within the Solutions SoC Engineering team to develop reusable verification environments, verification IP, and automation that ensure subsystem functionality and integration for Arm-based platforms.

Experience Level

Mid-level — typically 2–4 years of experience in IP or subsystem verification.

Responsibilities

Deliver verification for subsystem designs and integrations, from strategy to closure.

• Develop and execute verification strategies for subsystem-level designs and IP integration.
• Verify subsystem functionality: interconnects, memory interfaces, peripherals, power management, and software-visible features.
• Validate functionality under functional, integration, stress, and performance scenarios.
• Own verification deliverables and schedules through verification closure.
• Architect, develop, and maintain reusable verification environments, VIPs, methodologies, and automation.
• Create verification plans, test methodologies, test cases, and coverage-closure strategies.
• Drive functional, code, toggle, assertion, and coverage closure.
• Debug RTL, testbench, integration, and system-level issues.
• Collaborate with architecture, design, firmware, emulation, FPGA, validation, and post-silicon teams.
• Leverage scripting, automation, and AI-assisted workflows to improve productivity.

Requirements

Key technical must-haves and useful additional skills.

• Must-have: Strong knowledge of Verilog, SystemVerilog, UVM, and modern verification methodologies.
• Must-have: Understanding of subsystem architecture, integration, AMBA protocols, and memory hierarchy.
• Must-have: Experience with C/C++, scripting, coverage closure, and RTL/testbench debugging.
• Must-have: Strong analytical, communication, and collaboration skills.
• Nice-to-have: Experience verifying multimedia, security, PCIe, networking, storage, or memory subsystems.
• Nice-to-have: Knowledge of Arm architecture and AMBA protocols, UPF, formal verification, emulation, FPGA, or gate-level simulation.
• Nice-to-have: Experience developing reusable VIPs, automation frameworks, or AI-assisted verification workflows.

Education Requirements

Bachelor's or Master's degree in a relevant engineering discipline (e.g., Electrical/Electronics Engineering, Computer Engineering, Computer Science) as stated in the posting.

About the Company

Company: Arm

Headquarters: Cambridge, United Kingdom

ARM is a global leader in semiconductor and software design, driving innovation in computing technology. The company specializes in designing processors and systems that provide the essential building blocks for electronic devices. ARM's architecture is widely used in smartphones, servers, and IoT devices, and its collaborative culture fosters bold thinking, diversity, and high-impact benefits for its talented workforce.