Job Title
DFT Jobs in Burnaby
Role Summary
Multiple Design-for-Test (DFT) and RTL/ASIC engineering roles at Microchip Technology in Burnaby, BC. Positions focus on RTL implementation, DFT insertion and validation for ASIC/FPGA products.
Experience Level
Mid to senior-level positions (listings include Technical Staff, Principal, and Senior roles). Specific years of experience vary by role and are not listed on this page.
Responsibilities
Typical responsibilities across the listed openings include:
- Implement and maintain RTL (Verilog / SystemVerilog / VHDL) for digital blocks and subsystems.
- Design and integrate DFT structures and support test insertion workflows for ASIC/FPGA projects.
- Collaborate with verification, physical design, and test teams to deliver silicon-ready designs.
- Investigate and debug functional and test failures; support bring-up and validation activities.
Requirements
Summary of expected skills and qualifications (page lists specific languages per job):
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Must-have: Experience with RTL design using Verilog, SystemVerilog, or VHDL; familiarity with ASIC design flow and DFT concepts.
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Nice-to-have: Experience with ATPG/test insertion, test debug on silicon, scripting for automation (e.g. Python/Tcl), or prior ASIC/FPGA project experience.
- Strong collaboration and debugging skills; ability to work with cross-functional teams.
Education Requirements
Not specified.
About the Company
Company: Microchip
Headquarters: Chandler, Arizona, USA
Microchip is a leading semiconductor company focused on developing innovative solutions to enhance the human experience. With a commitment to empowering innovation, Microchip prioritizes the value of its employees by fostering a culture that supports their growth and contributions.

Date Posted: 2026-08-17