Standard Custom Design Engineer

Job Title

Standard Custom Design Engineer

Role Summary

Own critical mixed-signal subsystems that bring Synthara's compute-in-memory SRAM (ComputeRAM®) from design to silicon and into production. Design, verify, and characterize custom blocks including full-custom digital datapaths and memories on advanced CMOS nodes.

Work cross-functionally with digital and layout teams to meet aggressive power/performance/area and quality targets, and support tape-in, silicon bring-up, and production validation.

Experience Level

Mid-level / Mid-Career — typically MS +4 years of relevant industry experience or a PhD. Hands-on experience with sub-28 nm CMOS expected.

Responsibilities

Accountabilities for the role include design ownership, verification, cross-team coordination, and delivery of production-ready IP.

• Design and verify mixed-signal circuits and subsystems at transistor and block level (architecture, simulation, corners/Monte‑Carlo, modeling).
• Develop AI-related building blocks as part of in-memory computing technology.
• Collaborate across disciplines on interfaces, bus/standard-cell boundaries, and timing/power budgets.
• Produce IP-quality specifications, design reviews, verification collateral, and documentation for internal reuse and customer delivery.
• Automate characterization, regression runs, and report generation to ensure reproducibility and reliability.
• Deliver IP blocks through tape-in and silicon, and complete post-production test plans and correlation reports.

Requirements

Key must-have skills and preferred additions.

• Must-have: Hands-on experience with sub-28 nm CMOS process nodes.
• Must-have: Proven design ownership in one or more areas: datapath/standard-cell design, memory/SRAM design, data converters, ultra-low-power amplifiers, power-management/references, PLLs, or sensor signal-processing chains.
• Must-have: Strong transistor-level design and verification skills, including corner and Monte‑Carlo analysis and modeling.
• Must-have: Quality-oriented mindset, clear technical communication, and structured planning; comfortable working cross-functionally with digital, custom, and layout teams.
• Nice-to-have: Exposure to datapath/arith/bus/standard-cell co-design boundaries and device-level parasitics (glitch reduction, signal-integrity hand-offs).
• Nice-to-have: Scripting experience for mixed-signal automation (Python, Tcl).
• Nice-to-have: Familiarity with compute-in-memory or memory-periphery constraints (matching, IR/EM, variation, testability).

Education Requirements

MS plus 4+ years of relevant experience, or PhD (as stated in source: "Seniority: MS +4 years or PhD").

About the Company

Company: Synthara

Headquarters: Zürich, Switzerland

Synthara develops ComputeRAM® hardware and software for efficient on-device AI, providing compilers, drivers, SDKs and tooling to enable AI workloads from microcontrollers to accelerators, with a focus on hardware/software co-design and developer usability.