Standard Cell Design Engineer

Job Title

Standard Cell Design Engineer

Role Summary

Design and characterize standard-cell libraries for deep-submicron, FinFET and SOI technologies to support digital design flows. Work with IP/PDK and design-flow teams to develop reliable cell circuits, characterization methodologies, and flow improvements.

Experience Level

Mid-level — typically 3–5 years of relevant industry experience. PhD candidates with ~6 years of relevant experience are considered for advanced roles.

Responsibilities

Primary responsibilities include library design, characterization, and flow development. Key tasks:

• Define and update architecture for standard-cell libraries across process technologies and design flows.
• Design and optimize standard cells accounting for deep-submicron device physics and non-ideal effects.
• Develop and improve circuits and characterize cell libraries (generate and validate NLDM, CCS, ECSM views).
• Create and maintain characterization methodology and industry-standard flow automation.
• Troubleshoot and debug circuit and chip-level scenarios; validate cell performance in design contexts.
• Collaborate with cross-functional teams and document results for transfer into production flows.

Requirements

Must-have skills and competencies, plus a short list of preferred additions.

• Experience in standard-cell library development for digital designs, preferably in deep-submicron, FinFET or SOI technologies.
• Hands-on characterization experience with industry tools and view generation/validation (NLDM, CCS, ECSM).
• Strong circuit design and debugging skills; solid analytical and pragmatic problem-solving approach.
• Understanding of device physics relevant to submicron/FinFET designs.
• Good written and verbal English communication and ability to work in multi-disciplinary, multi-cultural teams.
• Ability to work in an industrial development environment combining project delivery and innovation.
• Nice-to-have: scripting skills (Perl/Tcl/Python), flow methodology development experience, exposure to chip-level scenarios.

Education Requirements

MS / M.Tech in Electrical or Electronics Engineering (listed with 3–5 years relevant experience). PhD in Electronics/Electrical/VLSI (listed with ~6 years relevant experience). No other formal degree or certification requirements were specified.

About the Company

Company: GlobalFoundries

Headquarters: Saratoga Springs, New York, USA

GlobalFoundries is a leading contract manufacturer for the global semiconductor industry, with facilities in multiple countries, including the USA. The company develops a broad portfolio of semiconductor technologies and employs around 13,000 people worldwide. GlobalFoundries focuses on enhancing competitiveness in specialized application solutions and fostering innovation in mobile communications, consumer electronics, and automotive applications.