Staff Video DV Engineer

Job Title

Staff Video DV Engineer

Role Summary

Lead verification engineer responsible for scoping and executing design verification for video codec IP and multimedia subsystems. The role covers testplan development, verification environment and model development, validation and delivery of IP for SoC integration.

The position requires technical leadership: building and managing a DV team and coordinating verification with architects, RTL designers, software and firmware engineers.

Experience Level

Senior — expected to have extensive ASIC DV experience (typical profile: 10+ years in verification and leadership roles; significant hands-on experience with verification environments and methodologies).

Responsibilities

You will lead verification efforts for video/multimedia hardware and subsystems and ensure quality delivery of IP for integration.

• Define verification scope and create test plans for video codec IP and multimedia subsystems.
• Design and develop DV environments, reference models, and testbench infrastructure.
• Implement coverage-driven, constrained-random verification using UVM/OVM and HVLs.
• Integrate C/C++/system models and firmware into the verification environment.
• Drive simulation acceleration and emulation efforts to improve regression throughput.
• Lead and mentor a DV team; coordinate cross-functional debug with architects, RTL, SW and FW teams.
• Debug complex system-level issues and support IP validation and SoC integration activities.

Requirements

Must-have technical skills and experience. Education requirements are summarized separately below.

• Extensive multimedia IP and subsystem verification experience spanning SW/FW/HW.
• Proven experience building and leading design verification teams.
• 10+ years developing and architecting verification testbenches and models for ASIC projects.
• ASIC DV experience verifying designs at Block, Core and Sub-system levels.
• 5+ years with HVLs and verification languages: SystemVerilog, OOP, UVM/OVM.
• Strong experience with Verilog, C/C++, and scripting (Tcl, Perl, Python, shell) and integrating models into testbenches.
• Experience with coverage-driven, constrained-random verification and verification planning.
• Nice-to-have: experience with simulation acceleration/emulation and multimedia HW accelerator or video codec verification (H.264, HEVC, VP9, AV1).

Education Requirements

Bachelor's, Master's or PhD in Electrical Engineering, Computer Science, Engineering, Information Systems or a closely related technical field are listed in the posting. The job also allows equivalent practical experience; the minimum-qualification variants in the source specify: Bachelor's + 4+ years, Master's + 3+ years, or PhD + 2+ years of relevant systems engineering or related work experience.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.