Staff Verification Engineer

Job Title

Staff Verification Engineer

Role Summary

The Staff Verification Engineer will validate highly configurable CPU cores and related IP to ensure they meet functional, performance, and architectural intent. The role sits on an Out-of-Order core verification team responsible for verification of frontend, mid-core, load-store unit, integer and floating execution units, and vector units implementing RVV.

Work involves creating test plans, building and running testbenches, analyzing failures, and driving coverage closure using modern verification methodologies.

Experience Level

Mid-level — typically 5–8 years of relevant verification or CPU/IP experience.

Responsibilities

The engineer will design and execute verification strategies to ensure IP correctness and coverage closure.

• Develop test plans and unit testbenches for CPU/core components and configurable IP.
• Create and run directed, constrained-random, and scenario tests; analyze failures and root causes.
• Measure and drive coverage closure using functional and structural coverage metrics.
• Adopt and apply state-of-the-art verification methodologies and tooling to in-house designs.
• Collaborate with architects, RTL designers, and system engineers to align verification with design intent.
• Troubleshoot complex verification and silicon issues and document findings.
• Contribute to verification infrastructure, regression automation, and verification IP reuse.

Requirements

Must-have technical skills and experience required for the role.

• 5+ years of experience in IP/component functional verification; experience with core/CPU verification preferred.
• Strong understanding of verification flow: test plan creation, test generation, failure analysis, coverage analysis, and closure.
• Deep understanding of computer architecture and CPU pipeline behavior.
• Experienced developer familiar with object-oriented programming and testbench development.
• Proficient troubleshooting and analytical skills.
• Good interpersonal and cross-disciplinary communication skills.

Nice-to-have:

• Direct experience with microarchitecture, instruction set design, or CPU pipeline optimization.
• Experience with vector extensions (e.g., RVV) or verification of vector units.
• Familiarity with functional or functional-style programming for verification utilities and generators.

Education Requirements

Bachelor's or Master's degree in Computer Science, Electrical Engineering, Computer Engineering, or a similar technical discipline (BS/MS). Equivalent practical experience is commonly accepted.

About the Company

Company: SiFive

Headquarters: San Mateo, California, United States

SiFive is a pioneering company in the RISC-V ecosystem, focused on transforming the future of computing by delivering high-performance, data-intensive RISC-V solutions. Their compute platforms empower leading technology firms to innovate across various markets, including AI, machine learning, and automotive sectors. SiFive is recognized for its commitment to ongoing innovation and fostering collaboration among talented teams, impacting lives by enabling advanced chip design.