Staff System Validation Engineer

Job Title

Staff System Validation Engineer

Role Summary

Member of the CoreIP team responsible for developing, deploying, and supporting emulation and FPGA environments for RISC-V processor and SoC designs. Work includes defining emulation test strategy, implementing test frameworks and plans, and debugging complex hardware, firmware, emulator, and silicon issues.

Collaborate with cross-functional teams to ensure readiness for silicon and software bring-up. This position is based in Hsinchu, Taiwan and requires the right to work in Taiwan and clearance for export-controlled technology as applicable.

Experience Level

Senior-level. The role expects more than 5 years of direct system development, validation, and debugging experience on FPGA platforms.

Responsibilities

Primary responsibilities include bringing up designs on emulation/FPGA platforms, defining test strategy, and resolving cross-domain issues.

• Bring up silicon designs on FPGA platforms and diagnose root causes for design, test, and emulator failures.
• Define and implement emulation strategies and test frameworks aligned to product goals.
• Develop and execute test plans; perform failure analysis, coverage analysis, and closure activities.
• Debug processor and SoC designs in FPGA and emulation environments, including hardware/software interactions.
• Integrate and validate required hardware and software components to establish readiness for silicon and software bring-up.
• Collaborate with firmware, design, verification, and software teams to reproduce and isolate complex issues.
• Maintain and support emulation and FPGA environments used for system validation.

Requirements

Essential skills and experience required for successful performance in this role.

• More than 5 years of direct system development, validation, and debugging experience on FPGA platforms (must-have).
• Ability to debug processor and SoC designs on FPGA/emulation platforms (must-have).
• Experience with Linux-based open-source software development (must-have).
• Solid understanding of processor and SoC architecture, or strong ability to learn quickly (must-have).
• Thorough understanding of high-level verification flow: test plan generation, test generation, failure analysis, coverage analysis, and closure (must-have).
• Strong problem-solving skills, attention to detail, and interpersonal skills to influence cross-disciplinary teams (must-have).
• Familiarity with emulation platforms and FPGA toolflows (nice-to-have).
• FuSa or RAS system-level validation experience (nice-to-have).
• Familiarity with or willingness to learn languages and methodologies such as Scala and Chisel (nice-to-have).
• Employment is contingent on satisfactory background/reference checks, verification of right to work in Taiwan, and any required export-control approvals (must-have).

Education Requirements

Not specified.

About the Company

Company: SiFive

Headquarters: San Mateo, California, United States

SiFive is a pioneering company in the RISC-V ecosystem, focused on transforming the future of computing by delivering high-performance, data-intensive RISC-V solutions. Their compute platforms empower leading technology firms to innovate across various markets, including AI, machine learning, and automotive sectors. SiFive is recognized for its commitment to ongoing innovation and fostering collaboration among talented teams, impacting lives by enabling advanced chip design.