Senior FPGA Engineer (VHDL/Verilog)
Design and optimize VHDL/Verilog implementations for networking hardware (SmartNICs, hybrid optical switches). Verify designs via simulation in a Python-based environment, integrate IP cores into FPGA projects, perform timing analysis and on-target verification, and support system-level performance testing and debugging with software and networking teams.
Senior-level. The posting designates this as a senior role; no explicit years-of-experience requirement provided.
Key responsibilities include:
Must-have technical skills and experience:
Master's degree in electronics engineering or a similar field, or equivalent practical experience.
Company: AGAD Technology
Headquarters: Brussels, Belgium
AGAD Technology specializes in embedded system development, offering a global presence with expertise in various markets. Based in Brussels with an office in Cairo, we provide bespoke solutions including talent sourcing, software testing, and process improvement across industries like healthcare and telecommunications. Our mission is to ensure high-quality service at competitive rates while driving client success with tailored solutions.
