Staff System Validation Engineer

Job Title

Staff System Validation Engineer

Role Summary

Join the CoreIP validation team to develop, deploy, and support emulation and FPGA environments for RISC-V processor and SoC designs. The role focuses on defining emulation test strategy, building test frameworks, executing test plans, and debugging complex hardware, firmware and software issues to enable silicon bring-up.

Experience Level

Senior — typically 5+ years of direct system development, validation and debugging experience on FPGA platforms.

Responsibilities

Key responsibilities include emulation and FPGA bring-up, test development, and cross-functional validation support.

• Bring up silicon designs on FPGA/emulation platforms and diagnose design, test, and environment failures.
• Define and implement emulation and FPGA-based test strategies and frameworks aligned to product goals.
• Create and execute test plans; perform failure analysis, coverage analysis, and drive closure.
• Debug complex interactions across hardware, firmware, and software during emulation and silicon bring-up.
• Collaborate with architecture, design, firmware and software teams to enable system readiness for silicon.
• Establish required hardware and software components on emulation to support software and silicon validation.

Requirements

Technical and practical skills required for day-to-day success. Items listed as "nice-to-have" are optional but desirable.

• Must-have: 5+ years of direct system development, validation and debugging on FPGA platforms.
• Must-have: Ability to debug processor and SoC designs on FPGA/emulation platforms.
• Must-have: Experience with Linux-based open source software development and working with embedded/firmware stacks.
• Must-have: Solid understanding of processor and SoC architecture, or the ability to quickly learn those concepts.
• Must-have: Familiarity with verification flow: test plan generation, test generation, failure analysis, coverage analysis, and closure.
• Must-have: Strong debugging skills, attention to detail, and commitment to product quality.
• Must-have: Good interpersonal skills and ability to work across disciplines.
• Nice-to-have: Functional safety (FuSa) or RAS system-level validation experience.
• Nice-to-have: Familiarity with Scala/Chisel or other non-standard verification languages and methodologies.
• Administrative: Must be authorized to work in Taiwan and able to pass background and reference checks; may require export-control authorization or company-sponsored license if not already authorized.

Education Requirements

Not specified.

About the Company

Company: SiFive

Headquarters: San Mateo, California, United States

SiFive is a pioneering company in the RISC-V ecosystem, focused on transforming the future of computing by delivering high-performance, data-intensive RISC-V solutions. Their compute platforms empower leading technology firms to innovate across various markets, including AI, machine learning, and automotive sectors. SiFive is recognized for its commitment to ongoing innovation and fostering collaboration among talented teams, impacting lives by enabling advanced chip design.