Skip to main content
Qualcomm logo

Staff SOC Mixed Signal Engineer

Qualcomm
August 31, 2026
Full-time
On-site
San Diego, California, United States
$155,168 - $210,000 USD yearly
Physical Design Jobs, Level - Senior

Job Title

Staff SOC Mixed Signal Engineer

Role Summary

Lead physical implementation and architecture for complex mixed-signal/ASIC blocks, owning implementation and verification strategy across multiple IPs. Work in the physical-design environment using industry tools to meet timing, power, and physical verification goals at advanced process nodes.

Act as a technical lead on projects: plan implementation, review junior engineers' work, resolve complex design and verification issues, and communicate results to project stakeholders.

Experience Level

Senior. The posting notes acceptance of a Master’s degree plus two (2) years of related experience as one documented qualification.

Responsibilities

Key responsibilities include:

  • Lead, plan, and perform physical design (PD) implementation for multiple complex blocks.
  • Develop and execute implementation strategies to meet system and customer requirements.
  • Use Cadence, Synopsys and related tools (e.g., Cadence Innovus, Synopsys tools) to run complete PD flows and debug issues.
  • Perform deep timing and clock-domain analysis; optimize clock latencies and reduce ECO cycle time.
  • Run advanced power checks and identify/resolve power-related issues across blocks.
  • Own design and verification strategies for ASICs and IP cores; review results from junior engineers and complete verification runs.
  • Collaborate with digital designers to understand timing specs and facilitate logic changes.
  • Write and review technical documentation and represent the team in design and project reviews.
  • Mentor junior engineers and propose process improvements to enhance workflow.

Requirements

Must-have technical skills and experience:

  • Proven ASIC physical design and implementation experience, including full PD flow ownership.
  • Hands-on experience with industry PD tools (Cadence Innovus, Synopsys flows, PTSI or equivalent).
  • Strong timing closure skills: static timing analysis, clock/data path analysis, and ECO execution.
  • Experience with power analysis and physical verification at deep sub-micron nodes.
  • Ability to lead technical efforts, review peers' work, and drive design decisions.
  • Strong problem-solving, documentation, and cross-functional communication skills.

Education Requirements

Will accept a Master’s Degree (or foreign academic equivalent) in Electrical Engineering, Computer Engineering, Computer Science, or a related field plus two (2) years of related experience. (Degree and years cited in the posting.)


About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.

Qualcomm logo

Date Posted: 2026-08-29