Job Title
Staff Signal Integrity Engineer, Infrastructure Hardware
Role Summary
Own signal integrity (SI) and power integrity (PI) methodology, design, analysis, and validation for Meta's data-center platforms (AI, networking, compute, storage). Collaborate with hardware design, silicon teams, and manufacturing partners to ensure reliable high-speed data transmission across electrical and optical interconnects.
Define SI/PI standards, guide platform architecture trade-offs, and deliver deployable channel solutions at board and system levels.
Experience Level
Senior β Staff-level role. Minimum 8+ years of experience in signal integrity engineering for high-speed digital systems.
Responsibilities
Primary responsibilities include:
- Develop SI/PI solutions across AI, networking, compute, and storage platforms.
- Perform signal integrity simulations and validation at platform, board, and system levels using tools such as HSpice, ADS, or Sigrity.
- Develop and maintain channel models, IBIS-AMI models, and S-parameter extraction workflows for end-to-end electrical-optical-electrical channels.
- Define and integrate on- and off-chip interconnect technologies into scalable systems.
- Specify stackup requirements, routing constraints, via structures, and impedance targets for multilayer high-speed designs.
- Lead lab correlation and validation activities using TDR, VNA, and oscilloscope measurements to verify simulations and characterize channels.
- Partner with silicon vendors and internal ASIC teams on PHY specifications, equalization parameters, and link training behavior.
- Establish SI design guidelines, review processes, and sign-off criteria across the infrastructure hardware portfolio.
- Identify systemic SI risks early and drive architectural trade-off decisions with platform and mechanical teams.
- Mentor engineers on SI principles, simulation best practices, and measurement techniques.
Requirements
Must-have qualifications and skills (education is listed separately below):
- 8+ years of experience in signal integrity engineering for high-speed digital systems, including board- and system-level SI/PI analysis.
- Experience with PCB board-level design and layout and high-speed interconnects using merchant silicon ASICs.
- Experience working with ODMs and contract manufacturers.
- Proven track record of conceptualizing and delivering engineering solutions to customers.
- Programming experience for test/measurement automation and/or simulation scripting.
- Strong lab measurement skills and experience correlating simulation with TDR, VNA, and oscilloscope data.
- Ability to collaborate across platform architecture, hardware, and mechanical engineering teams.
Nice-to-have:
- Experience with 112G/224G PAM4 SerDes channel design, co-packaged optics, and optical channels for data center networking.
- Background in open compute or hyperscale data center hardware development across full platform cycles.
- Familiarity with IBIS-AMI modeling, channel simulation automation, and statistical eye analysis.
- Experience collaborating with silicon vendors on SerDes bring-up, equalization tuning, and compliance testing.
- Knowledge of advanced PCB materials, HDI, and evolving interconnect technologies.
Education Requirements
Bachelor's degree in Electrical Engineering, Computer Science, Computer Engineering, or a related technical field, or equivalent practical experience. (Equivalent practical experience is explicitly accepted.)
About the Company
Company: Meta Platforms
Headquarters: Menlo Park, California, United States
American technology company that develops social networking products (Facebook, Instagram, WhatsApp) and invests in virtual/augmented reality hardware and software through Reality Labs, focusing on connectivity, advertising, and immersive computing experiences.

Date Posted: 2026-07-31