Staff / Senior Staff / Principal Engineer, Digital Design
RenesasJob Title
Staff / Senior Staff / Principal Engineer, Digital Design
Role Summary
Lead RTL design and delivery of complex IPs and subsystems for MCU SoCs. Own micro-architecture, RTL implementation, and handoff artifacts; collaborate with verification, physical design, system architects, and software teams to meet performance, power, and area targets.
This role includes technical leadership, mentoring junior engineers, and improving RTL design methodologies and quality checks across the team.
Experience Level
Senior — minimum 8 years of hands-on digital IC/ASIC design experience.
Responsibilities
Deliver RTL blocks and support SoC integration, verification, and handoff.
- Lead RTL design and development of complex IPs and subsystems to meet PPA targets.
- Define micro-architecture and high-level digital design for assigned blocks.
- Provide subsystem views, documentation, and integration support to back-end and verification teams.
- Perform and own RTL quality checks including lint, CDC, and RDC; support functional verification.
- Collaborate with architects, verification, physical design, and software teams to define specifications and ensure end-to-end integration.
- Mentor and provide technical guidance to junior engineers.
- Contribute to RTL design methodology, coding guidelines, and process improvements.
Requirements
Must-have skills and experience; preferred items listed separately.
- Minimum 8 years of hands-on digital IC/ASIC design experience.
- Strong RTL design experience using Verilog or VHDL.
- Solid understanding of digital design fundamentals: timing analysis, clocking, resets, and verification methodologies.
- Experience with industry-standard EDA tools for synthesis, simulation, and static timing analysis.
- Proven problem-solving ability and experience owning blocks end-to-end.
Nice-to-have:
- Experience owning complex IPs or subsystems in large SoCs.
- Background in micro-architecture and high-level digital design.
- Hands-on use of RTL quality tools such as Spyglass (lint, CDC, RDC).
- Experience with low-power design techniques and SoC-level integration.
- Scripting skills (Shell, Perl, Python) or use of AI tools for design automation.
Education Requirements
Bachelor's degree in Electronics & Communication Engineering, Electrical Engineering, Computer Engineering, or a related technical field (as stated in the posting).
About the Company
Company: Renesas
Headquarters: Hitachinaka, Japan
Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.
