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Staff Research Scientist, AI‑Hardware Co‑Design

Analog Devices
August 22, 2026
Full-time
On-site
Boston, Massachusetts, United States
$172,000 - $236,500 USD yearly
SoC Architecture Jobs, Level - Senior

Job Title

Staff Research Scientist, AI‑Hardware Co‑Design

Role Summary

Architect and validate co‑design solutions that align advanced AI algorithms with hardware implementations for edge and embedded systems. Operate at the intersection of algorithm research and compute architecture to define optimal compute strategies and drive proof‑of‑concepts toward deployable systems.

Experience Level

Senior-level individual contributor (Staff). Technical leadership and thought leadership expectations.

Responsibilities

Deliver system‑level analysis, architectural direction, and validated prototypes that translate research into product‑grade compute solutions.

  • Define strategic problems where algorithm-hardware co‑design enables novel capabilities across sensing and actuation.
  • Lead technical execution from architecture to validated proof‑of‑concepts with researchers and hardware engineers.
  • Perform feasibility analysis using high‑fidelity simulation and modeling to quantify impacts of memory hierarchy, dataflow, and precision.
  • Drive co‑design of algorithms and hardware: adapt neural architectures, select compute substrates (MCUs to custom accelerators), and optimize for power/area.
  • Mentor engineers, introduce state‑of‑the‑art compute paradigms, and maintain awareness of academic and industry advances.

Requirements

Must-have technical skills and experience for effective performance in the role.

  • Proven system‑level hardware expertise: led AI SoC design or validated novel architectures via cycle‑accurate simulation.
  • Deep understanding of data movement, memory bandwidth, on‑chip networks, and execution models for efficient compute.
  • Expertise in hardware‑aware deep learning, including model training/fine‑tuning and validating architectural hypotheses.
  • Practical skills in mapping computational graphs to silicon: dataflow orchestration, tiling strategies, and quantization (e.g., INT8, mixed precision).
  • Demonstrated silicon execution (taped‑out SoC or custom accelerator) or equivalent project delivery experience.
  • Familiarity with DSP concepts (Fourier transforms, sampling, noise floors) and integrating classical signal processing with neural methods.
  • Hands‑on RTL familiarity (Verilog/SystemVerilog, Chisel, PyMTL) is a strong plus.
  • Strong publication record in top conferences or journals is desirable.
  • Willingness to travel up to 10%.

Education Requirements

PhD in Computer Architecture or Integrated Circuit Design for AI workloads is required, plus at least 3+ years of industry experience applying architectural principles to real engineering constraints.


About the Company

Company: Analog Devices

Headquarters: Norwood, Massachusetts, USA

Analog Devices is a leading global semiconductor company that bridges the physical and digital worlds, enabling breakthroughs at the Intelligent Edge. With a focus on innovation, ADI develops solutions that drive advancements in digitized factories, mobility, and digital healthcare. The company employs around 24,000 people globally and reported revenues exceeding $9 billion in FY24, creating technologies that transform lives across various sectors.

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Date Posted: 2026-08-21