Staff / Principal - Memory Circuit Design Verification

Job Title

Staff / Principal - Memory Circuit Design Verification

Role Summary

Lead verification efforts for complex full-chip memory circuit designs, focusing on gate-level custom designs, advanced low-power and power-management technologies, and high-speed DRAM/HBM architectures.

The role partners with global design and verification teams to define verification strategy, develop verification environments, and deliver pre-silicon simulation, analysis, and debug for memory products.

Experience Level

Senior-level role focused on technical leadership within verification teams.

Responsibilities

Primary duties include driving verification strategy, executing pre-silicon validation, and improving verification flows for advanced memory products.

• Set direction and guide verification efforts across assigned projects.
• Simulate, analyze, and debug pre-silicon full-chip gate-level designs.
• Develop test cases and stimulus to increase functional coverage for DRAM, HBM, and emerging memory architectures.
• Develop verification methodology and environments for advanced memory products.
• Maintain test benches and test vectors; run regressions and perform coverage analysis and improvements.
• Collaborate with international colleagues to develop new verification flows and resolve cross-functional issues.
• Leverage and adopt AI-enabled verification methods where applicable.

Requirements

Must-have skills and experience for success in this role.

• Proven ownership of verification and end-to-end analysis for full-chip gate-level custom designs.
• Experience with simulation tools, testbench development, test vectors, and regression-based coverage analysis.
• Practical knowledge of DRAM and HBM architectures and features for high-speed memory products.
• Experience developing verification methodology and environments for complex memory designs.
• Strong debugging and analysis skills for pre-silicon validation.
• Ability to collaborate effectively with distributed, cross-functional teams.
• Familiarity with low-power and power-management design considerations.
• Exposure to or willingness to adopt AI-enabled verification approaches (nice-to-have).

Education Requirements

ME / MTech with 8+ years of experience, or BE / BTech with 10+ years of experience. (Degrees listed in the source.)