Staff Physical Design Engineer — Top-Level Timing & STA
7Rays SemiconductorsJob Title
Staff Physical Design Engineer — Top-Level Timing & STA
Role Summary
Lead STA engineer responsible for full-chip timing signoff of advanced-node SoCs (5nm / 3nm / 2nm). Works closely with RTL, Physical Design, and Clock teams to achieve timing closure and tapeout signoff.
Experience Level
Senior / Staff level. Title indicates staff-level responsibility; specific years of experience not specified.
Responsibilities
Primary responsibilities include ownership of full-chip STA, driving MMMC timing closure, and coordinating ECO convergence and signoff.
- Own full-chip STA across all modes and PVT corners.
- Drive MMMC timing closure and convergence.
- Develop and maintain timing constraints and hierarchical timing budgets.
- Analyze setup/hold violations and lead ECO closure.
- Execute timing signoff using industry-standard tools.
- Collaborate with RTL, Physical Design, and Clock teams to improve timing QoR.
- Debug complex timing issues at top-level integration.
- Improve signoff methodologies for runtime and convergence efficiency.
- Present timing closure status and risks to leadership teams.
Requirements
Must-have technical skills and experience for successful execution of the role; additional preferred skills listed below.
- Must-have: Proven expertise in full-chip STA, MMMC timing closure, hierarchical timing budgeting, ECO convergence, and final tapeout timing signoff.
- Must-have: Hands-on experience with Synopsys PrimeTime (PT / PT-SI) and/or Cadence Tempus for timing signoff.
- Must-have: Experience with advanced process nodes (5nm, 3nm, 2nm).
- Must-have: Scripting proficiency, especially Tcl; Python or Perl experience desirable.
- Must-have: Ability to analyze setup/hold violations and drive ECO closure across cross-functional teams.
- Nice-to-have: Crosstalk / signal-integrity analysis experience and familiarity with OCV / AOCV / POCV.
- Nice-to-have: Prior work improving signoff methodologies for runtime and convergence efficiency.
Education Requirements
Not specified.
About the Company
Company: 7Rays Semiconductors
Fabless semiconductor company specializing in advanced system-on-chip (SoC) development and physical design for high-performance silicon at leading-edge process nodes (5nm/3nm/2nm). Focus areas include timing signoff, STA, and integration for complex SoCs.
