Job Title
Staff Physical Design Engineer - DPG-LPDDR
Role Summary
Lead RTL-to-GDSII physical implementation for advanced memory and SoC designs within Micron's DPG-LPDDR team. The role directs physical design execution, drives methodology and automation improvements, and coordinates cross-functional teams to achieve tape-out readiness.
Experience Level
Senior-level role. The posting specifies 15+ years of hands-on physical design experience with multiple successful SoC tape-outs.
Responsibilities
Deliver end-to-end physical implementation and technical leadership for complex SoC and memory designs.
- Lead RTL-to-GDSII flow including floor planning, power planning, clock tree synthesis, place & route, timing closure, and signoff.
- Drive PPA optimization, low-power implementation, congestion management, and design convergence.
- Own STA, SI, EM/IR analysis, DRC/LVS closure, and overall reliability closure for tape-out readiness.
- Define and improve physical design methodologies, automation strategies, and tool flows.
- Partner with Architecture, RTL, DFT, Verification, CAD, and Product teams to resolve complex implementation issues.
- Provide technical leadership, mentor engineers, and coordinate execution across global teams.
- Apply AI/ML tools to improve RTL-to-GDSII productivity and integrate generative/agentic AI for automation and workflow optimization.
- Perform or oversee custom layout work where analog/mixed-signal integration or layout optimization is required.
Requirements
Key technical and leadership requirements. Items labeled "Must-have" are required; "Nice-to-have" indicate additional desirable experience.
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Must-have: 15+ years of hands-on physical design experience with multiple successful SoC tape-outs.
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Must-have: Strong expertise in floor planning, CTS, place & route, STA, low-power design techniques, physical verification, and signoff.
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Must-have: Hands-on experience with implementation and signoff tools such as ICC2/Fusion Compiler, Innovus, PrimeTime, Calibre, and EM/IR analysis tools.
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Must-have: Proficiency in scripting (Tcl, Python, Perl, or Shell) for automation and flow development.
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Must-have: Demonstrated ability to lead large-scale RTL-to-GDSII programs and deliver first-pass silicon success.
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Nice-to-have: Experience in AI/ML, HPC, CPU, GPU, Networking, or Memory SoC designs; hands-on custom layout for analog/mixed-signal integration.
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Nice-to-have: Proven track record in driving physical design methodology, tool automation, and organizational technical excellence.
Education Requirements
B.Tech or M.Tech in Electrical Engineering, VLSI, or a related technical field (as specified in the source posting).
About the Company
Company: Micron Technology
Headquarters: Boise, Idaho, USA
Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.

Date Posted: 2026-08-19